MC33201, MC33202, MC33204, NCV33202, NCV33204
PD(max) , MAXIMUM POWER DISSIPATION (mW
2500
8 and 14 Pin DIP Pkg
2000
1500
1000
500
SOIC−8
Pkg
TSSOP−14 Pkg
SO−14 Pkg
PERCENTAGE OF AMPLIFIERS (%)
40
35
30
25
20
15
10
5.0
0
−10 − 8.0 − 6.0 − 4.0 − 2.0
0
2.0 4.0 6.0
V
IO
, INPUT OFFSET VOLTAGE (mV)
8.0
10
360 amplifiers tested from
3 (MC33204) wafer lots
V
CC
= + 5.0 V
V
EE
= Gnd
T
A
= 25°C
DIP Package
0
− 55 − 40 − 25
0
25
50
85
T
A
, AMBIENT TEMPERATURE (°C)
125
Figure 2. Maximum Power Dissipation
versus Temperature
Figure 3. Input Offset Voltage Distribution
50
40
PERCENTAGE OF AMPLIFIERS (%)
30
20
10
0
− 50 − 40 − 30 − 20
360 amplifiers tested from
3 (MC33204) wafer lots
V
CC
= + 5.0 V
V
EE
= Gnd
T
A
= 25°C
DIP Package
200
I IB , INPUT BIAS CURRENT (nA)
V
CC
= + 5.0 V
V
EE
= Gnd
160
120
80
V
CM
> 1.0 V
40
0
− 55 − 40 − 25
V
CM
= 0 V to 0.5 V
−10
0
10
20
30
40
50
0
25
70
85
125
TC
V
, INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT (
m
V/
°
C)
IO
T
A
, AMBIENT TEMPERATURE (°C)
Figure 4. Input Offset Voltage
Temperature Coefficient Distribution
Figure 5. Input Bias Current
versus Temperature
A VOL , OPEN LOOP VOLTAGE GAIN (kV/V)
150
I IB , INPUT BIAS CURRENT (nA)
100
50
0
− 50
−100
−150
− 200
− 250
0
V
CC
= 12 V
V
EE
= Gnd
T
A
= 25°C
2.0
4.0
6.0
8.0
10
V
CM
, INPUT COMMON MODE VOLTAGE (V)
12
300
260
220
180
140
V
CC
= + 5.0 V
V
EE
= Gnd
R
L
= 600
W
DV
O
= 0.5 V to 4.5 V
0
25
70
85
T
A
, AMBIENT TEMPERATURE (°C)
105
125
100
− 55 − 40 − 25
Figure 6. Input Bias Current
versus Common Mode Voltage
Figure 7. Open Loop Voltage Gain versus
Temperature
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