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MC74VHC00MEL 参数 Datasheet PDF下载

MC74VHC00MEL图片预览
型号: MC74VHC00MEL
PDF下载: 下载PDF文件 查看货源
内容描述: 四2输入与非门 [Quad 2−Input NAND Gate]
分类和应用: 栅极触发器逻辑集成电路光电二极管
文件页数/大小: 6 页 / 93 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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MC74VHC00
Quad 2−Input NAND Gate
The MC74VHC00 is an advanced high speed CMOS 2−input
NAND gate fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems.
Features
http://onsemi.com
MARKING
DIAGRAMS
14
SO−14
D SUFFIX
CASE 751A
VHC00G
AWLYWW
1
High Speed: t
PD
= 3.7 ns (Typ) at V
CC
= 5 V
Low Power Dissipation: I
CC
= 2
mA
(Max) at T
A
= 25°C
High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 32 FETs or 8 Equivalent Gates
Pb−Free Packages are Available
V
CC
14
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
14
VHC
00
ALYW
G
G
1
TSSOP−14
DT SUFFIX
CASE 948G
14
EIAJ SO−14
M SUFFIX
CASE 965
1
A
L, WL
Y
W, WW
G,
G
74VHC00
ALYWG
1
A1
2
B1
3
Y1
4
A2
5
B2
6
Y2
7
GND
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Device
Figure 1. Pinout: 14−Lead Packages
(Top View)
FUNCTION TABLE
Inputs
A
L
L
H
H
B
L
H
L
H
Output
Y
H
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
January, 2006 − Rev. 5
Publication Order Number:
MC74VHC00/D