TL494, NCV494
SWITCHMODE™ Pulse Width
Modulation Control Circuit
The TL494 is a fixed frequency, pulse width modulation control
circuit designed primarily for SWITCHMODE power supply control.
Features
•
•
•
•
•
•
•
•
•
Complete Pulse Width Modulation Control Circuitry
On−Chip Oscillator with Master or Slave Operation
On−Chip Error Amplifiers
On−Chip 5.0 V Reference
Adjustable Deadtime Control
Uncommitted Output Transistors Rated to 500 mA Source or Sink
Output Control for Push−Pull or Single−Ended Operation
Undervoltage Lockout
NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
•
Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
1
TL494xDG
AWLYWW
16
PDIP−16
*
N SUFFIX
CASE 648
1
TL494xN
AWLYYWWG
MAXIMUM RATINGS
(Full operating ambient temperature range applies,
unless otherwise noted.)
Rating
Power Supply Voltage
Collector Output Voltage
Collector Output Current
(Each transistor) (Note 1)
Amplifier Input Voltage Range
Power Dissipation @ T
A
≤
45°C
Thermal Resistance, Junction−to−Ambient
Operating Junction Temperature
Storage Temperature Range
Operating Ambient Temperature Range
TL494B
TL494C
TL494I
NCV494B
Derating Ambient Temperature
Symbol
V
CC
V
C1
,
V
C2
I
C1
, I
C2
V
IR
P
D
R
qJA
T
J
T
stg
T
A
−40 to +125
0 to +70
−40 to +85
−40 to +125
T
A
45
°C
Value
42
42
500
−0.3 to +42
1000
80
125
−55 to +125
Unit
V
V
mA
*This marking diagram also applies to NCV494.
V
mW
°C/W
°C
°C
°C
x
A
WL
YY, Y
WW, W
G
= B, C or I
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
Noninv
Input 1
Inv
Input 2
Compen/PWN
Comp Input 3
Deadtime
Control 4
C
T
5
Oscillator
+
Error 1
Amp
−
+
2 Error
Amp
−
V
CC
≈
0.1 V
5.0 V
REF
Noninv
16 Input
Inv
15 Input
14 V
ref
Output
13 Contro
l
12 V
CC
11 C2
R
T
6
Q2
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Maximum thermal limits must be observed.
Ground 7
C1 8
Q1
10 E2
9 E1
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
June, 2005 − Rev. 6
Publication Order Number:
TL494/D
ONSEMI [ ON SEMICONDUCTOR ]
