If small wire cables are used, good engineering practice is to
calculate the wire resistance of the ground and the +5 volt
wires. More than 0.2 volt drop (at 100 ma per digit) should be
avoided, since this loss is in addition to any inaccuracies or load
regulation of the power supply.
The 5 volt power supply for the DLO4135/DLG4137 should be
the same one supplying the V
CC
to all logic devices. If a separate
power supply must be used, then local buffers should be used
on all the inputs. These buffers should be powered from the dis-
play power supply. This precaution is to avoid line transients or
any logic signals to be higher than V
CC
during power up.
Figure 5. Block diagram of the Intel 8031 controller
DØ
x
x
x
x
x
Subroutine to Load an 8-digit Display using the DLO4135/
DLG4137
; DATA IN RAM 10H-17H
(MSD-LSD)
; PORT 1 ALL HIGH (WRITE)
; PORT 2 ALL LOW (DATA)
; RAM ADDRESS—1
; WRITE PULSE
; COUNTER
; INCREMENT RAM POINTER
; FETCH DATA FROM RAM
; LOAD PORT 2
; RECALL WRITE
; SHIFT A TO NEXT WRITE
; SAVE WRITE
; SEND WRITE PULSE
; WAIT
; RESET WRITE PULSE
; LOAD COMPLETE?
; RETURN TO MAIN PROGRAM
INIT
D7
BUFFER
P3.0
P3.1
P3.2
P3.6
ORL
ORL
MOV
MOV
MOV
START: INC
DATA: MOV
OUTL
MOV
RR
MOV
WRITE: OUTL
MOV
OUTL
DJNZ
RET
P1,#0FFH
P2,#00H
R1,#OFH
R2,#0FEH
R3,#08H
R1
A,@R1
P2,A
A,R2
A
R2,A
P1,A
A,#OFFH
P1,A
R3,START
BLØ
BL1
LT
WR
CE
74LS244
BLØ
BL1
LT
WR
CE
8031
PØ
8
Figure 7.
Block diagram for 8-digit DLO4135/DLG4137
74LS138
8
3
8
ALE
PSEN
74373
Eight DLX413X
8080
or
8085
System
Data
I/OW
Decoder
A0
A1
Address A2
8
A0-A7
LATCH
OE
DECODER
EPROM
27xx
Interfacing
For an eight digit display using the DLO4135/DLG4137, inter-
facing to a single chip microprocessor such as the 8748, is easy
and straight forward. One approach may be to dedicate one
port for the seven data signals and another 8-bit port for the
write signals. The schematic is shown in Figure 6.
I/O or Memory Mapped System
For a memory mapped system using a processor such as the
8080 or 8085, the interfacing is also straight-forward. Each dis-
play is treated as a memory location with its own address, like
another I/O or RAM location. See Figure 7.
Figure 6. DLO4135/DLG4137 with 8748
Routine for an 8-Digit Display using the DLO4135/DLG4137
and 8085 or 8080 Microprocessor
;
;
;
;
;
;
;
;
;
;
DATA TO BE DISPLAYED IS IN
A0 (LSD) THRU A7 (MSD)
DISPLAY ADDRESS C00X
LSD IS RIGHT MOST DIGIT
DOES NOT SAVE REG A,B,H,L,D,E
DADD EQU
DPAD EQU
LEN
EQU
100H
0A000H
0C000H
08H
P2
6543210
7
D0
D1
D2
D3
D4
D5
D6
8748
6
DATA ADDRESS LOCATION
DISPLAY ADDRESS
LOCATION
; DISPLAY LENGTH
;
;
;
;
;
;
;
;
;
;
;
;
;
;
LOAD DATA ADDRESS
LOAD DISPLAY ADDRESS
LOAD DISPLAY LENGTH
GET DATA
XCHG H/L & D/E
LOAD DISPLAY FROM REG A
RESTORE H/L & D/E
INCREMENT DISPLAY ADDRESS
INCREMENT DATA ADDRESS
DECREMENT LENGTH COUNTER
END OF DISPLAY?
RETURN TO MAIN PROGRAM
Appnote 28
P1
5
4
3
2
1
0
ORG
DISP:
DLO 4135
DLG 4137
+
LXI
LXI
MVI
DISP1: MOV
XCHG
MOV
XCHG
INX
INX
DCR
JNZ
RET
(MSD)
(LSD)
H,DADD
D,DPAD
B,LEN
A,M
M,A
D
H
B
DISP1
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
B0
B1
LT
B0
B1
LT
B0
B1
LT
B0
B1
LT
B0
B1
LT
B0
B1
LT
B0
B1
LT
B0
B1
LT
3
May 31, 2000-13
OSRAM [ OSRAM GMBH ]
