OX16PCI952
DATA SHEET
F
EATURES
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Integrated High Performance Dual UARTs,
Parallel Port and 5.0v PCI interface
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Automated out-of-band flow control using CTS#/RTS#
and/or DSR#/DTR#
Arbitrary trigger levels for receiver and transmitter
FIFO interrupts and automatic in-band and out-of-
band flow control
Infra-red (IrDA) receiver and transmitter operation
5, 6, 7, 8 and 9-bits data framing
Global Interrupt Status and readable FIFO levels to
facilitate implementation of efficient device drivers
Detection of bad data in the receiver FIFO
2 multi-purpose IO pins which can be configured as
interrupt inputs or ‘wake-up’ pins (via local registers).
Auto-detection of a range of optional Microwire
TM
compatible EEPROMs, to reconfigure device.
Operation via IO or memory mapping.
5.0V operation
128 pin TQFP package
Two 16C950 High performance UART channels
IEEE1284 Compliant SPP/EPP/ECP parallel port
Multi-function target PCI controller. Fully compliant to
PCI bus specification 2.2 and PCI Power Management
1.0.
Function access to pre-configure each UART and the
parallel port, prior to handover to generic device
drivers.
UARTs fully software compatible with 16C550-type
devices.
Baud rates up to 15Mbps in asynchronous mode and
60Mbps in external 1x clock mode
128-byte deep FIFO per transmitter and receiver
Flexible clock prescaler from 1 to 31.875
Automated in-band flow control using programmable
Xon/Xoff in both directions
D
ESCRIPTION
The OX16PCI952 is a single chip solution for PCI-based
serial and parallel expansion add-in cards. It is a dual
function device, offering IO or memory mapped access to
the two ultra-high performance OX16C950 UARTs and the
bi-directional parallel port. These functions are defined by
Function 0 and Function 1, respectively. Serial port cards
with 2 serial ports and a parallel port can be designed
without redefining any device parameters.
Each UART channel in the OX16PCI952, is the fastest
available PC-compatible UART, offering data rates up to
15Mbps and 128-byte deep transmitter and receiver FIFOs.
The deep FIFOs reduce CPU overhead and allow
utilisation of higher data rates. Each UART channel is
software compatible with the widely used industry-standard
16C550 devices and compatibles, as well as the
OX16C95x family of high performance UARTs. In addition
to increased performance and FIFO size, the UARTs also
provide the full set of OX16C95x enhanced features
including automated in-band flow control, readable FIFO
levels, etc.
The parallel port is an IEEE 1284 compliant SPP, EPP and
ECP parallel port that fully supports the existing Centronics
interface. For legacy applications, the PCI resources have
been arranged so that the parallel port can be located at
standard I/O addresses
A set of local registers is available to enhance device driver
efficiency and reduce interrupt latency. Each internal UART
has features such as shadowed FIFO fill levels, an interrupt
source register and Good-Data Status, readable in
consecutive DWORD registers and is visible to logical
function0 in both IO space and memory space. The local
registers also provide additional controls for each UART
and the parallel port, to customise the device for the end-
users application.
The efficient 32-bit, 33MHz target-only interface is
compliant with the PCI bus specification version 2.2 and
version 1.0 of PCI Power Management Specification.
For full flexibility, all the default configuration register
values can be overwritten using an optional Microwire
TM
compatible serial EEPROM.
This EEPROM can also be used to provide
function access
to pre-configure each UART into enhanced modes or pre-
configure the parallel port, prior to any PCI configuration
accesses and before control is handed to generic device
drivers.
Microwire
TM
is a trade mark of National Semiconductor.
Oxford Semiconductor Ltd.
25 Milton Park, Abingdon, Oxon, OX14 4SH, UK
Tel: +44 (0)1235 824900
External—Free Release
Fax: +44(0)1235 821141
©
Oxford Semiconductor 2005
DS-0028 Jul 05
Part No. OX16PCI952-TQC60-A
OX16PCI952-TQAG
OXFORD [ OXFORD SEMICONDUCTOR ]
