UHP112
Two-Port PCI-to-USB OpenHCI Host Controller
Description (continued)
UHP112 PCI-TO-USB OpenHCI HOST CONTROLLER
ROM
BIOS
MASTER
FIFOs
ADDRESS
OHCI
ROOT
HUB
W DATA
DATA
ADDRESS
ADDRESS/
DATA
DATA
R DATA
ADDRESS
R DATA
HCI
CONTROL
CONTROL
USB
ADDRESS/
DATA
DATA
DATA
ROOT
HUB
AND
HOST
SIE
SLAVE
BLOCK
STATE
PORT
1
PARITY
USB
USB
CONTROL
MUX
TX
RX
CONTROL
ADDRESS
CONTROL
OHCI
REG
LIST
PORT
2
W DATA
CLOCK
MUX
CONTROL
CONTROL
PROCESSOR
BLOCK
CONTROL
SLAVE
FIFOs
12/1.5
DATA
ED AND TD
REGS
DATA
IDSEL
CONFIG.
BLOCK
STATUS
HCI
ADDRESS/
DATA
HSIE
S/M
MASTER
BLOCK
STATUS
DATA
DATA
DATA
DATA
CONTROL
PCI
64 x 8
FIFO
DPLL
SLAVE
CONTROL
CONTROL
PCI
FIFO STATUS
F-BUS CONTROL
F-BUS IRQ
MASTER
CONTROL
PCI
CONTROL
FIFO
INTA
INTR.
64 x 8
BLOCK
5-5596.b
Figure 1. UHP112 Interconnection Diagram
Applicable Documents and Specifications
Q PCI Local Bus Specification Revision 2.1s., June 1, 1995. PCI Special Interest Group.
Q Universal Serial Bus Specification Revision 1.1., September 23, 1998. Compaq/Digital Equipment Corporation/
IBM PC Company/Intel/Microsoft/NEC/Northern Telecom.
Q OpenHCI Open Host Controller Interface Specification for USB Release 1.0a., July 31, 1997. Compaq/Microsoft/
National Semiconductor.
Q PCI Bus Power Management Interface Specification Revision 1.1., December 18, 1998. PCI Special Interest
Group.
2
Transdimension Inc.
OXFORD [ OXFORD SEMICONDUCTOR ]
