0.5A Low Voltage- Low Dropout CMOS Regulator
Application Information
T h e PA M 3 1 0 5 f a m i l y o f l o w - d r o p o u t ( L D O )
regulators have several features that allow them to
apply to a wide range of applications. The family
operates with very low input voltage (1.4V) and low
dropout voltage (typically 50mV at full load),
making it an efficient stand-alone power supply or
post regulator for battery or switch mode power
supplies. The 0.5A output current makes the
PAM3105 family suitable for powering many
microprocessors. The PAM3105 family also has
low output noise (typically 40μVRMS with 2.2μF
output capacitor), making it ideal for use in telecom
equipment.
External Capacitor Requirements
A 2.2μF or larger ceramic input bypass capacitor,
connected between VIN and GND and located
close to the PAM3105, is required for stability. A
1.0uF minimum value capacitor from VOUT to GND
is also required. To improve transient response,
noise rejection, and ripple rejection, an additional
10μF or larger,low ESR capacitor is recommended
at the output. A higher value, low ESR output
capacitor may be necessary if large, fast-rise-time
load transients are anticipated and the device is
located several inches from the power source,
especially if the minimum input voltage of 1.4 V is
used.
Regulator Protection
The PAM3105 features internal current limiting and
thermal protection. During normal operation, the
PAM3105 limits output current to approximately
1A. When current limiting engages, the output
voltage scales back linearly until the over current
condition ends. While current limiting is designed
to prevent gross device failure, care should be
taken not to exceed the power dissipation ratings
of the package. If the temperature of the device
exceeds 150°C, thermal-protection circuitry will
shut it down. Once the device has cooled down to
approximately 50°C below the high temp trip point,
regulator operation resumes.
Thermal Information
The amount of heat that an LDO linear regulator
generates is:
Power=(V
IN
-V
O
)I
O
.
All integrated circuits have a maximum
allowable junction temperature (T
J
max) above
which normal operation is not assured. A system
designer must design the operating environment
so that the operating junction temperature (T
J
)
does not exceed the maximum junction
temperature (T
J
max). The two main
environmental variables that a designer can use
to improve thermal performance are air flow and
external heatsinks. The purpose of this
information is to aid the designer in determining
the proper operating environment for a linear
regulator that is operating at a specific power
level.
In general, the maximum expected power
(P
D
(max)) consumed by a linear regulator is
computed as:
PAM3105
P
DMAX
=
(
V
I
(
avg
)
-V
O
(
avg
)
)
×I
O
(
avg
)
+V
I
(
avg
)
×I
(
Q
)
(1)
Where:
l
V
I (avg)
is the average input voltage.
l
V
O(avg)
is the average output voltage.
l
I
O(avg)
is the average output current.
l
I
(Q)
is the quiescent current.
For most LDO regulators, the quiescent current
is insignificant compared to the average output
current; therefore, the term V
I(avg)
xI
(Q)
can be
neglected. The operating junction temperature
is computed by adding the ambient temperature
(T
A
) and the increase in temperature due to the
regulator' s power dissipation. The temperature
rise is computed by multiplying the maximum
expected power dissipation by the sum of the
thermal resistances between the junction and
the case ( R
θJC
), the case to heatsink (R
θCS
), and
t h e h e a t s i n k t o a m b i e n t ( R
θSA
) . T h e r m a l
resistances are measures of how effectively an
object dissipates heat. Typically, the larger the
device, the more surface area available for
power dissipation so that the object 's thermal
resistance will be lower.
Power Analog Microelectronics
,
Inc
www.poweranalog.com
08/2007
9
PAM [ POWER ANALOG MICOELECTRONICS ]
