PE926C31
Product Specification
Figure 2. Pin Configuration (Top View)
A
AQ+
AQ-
E+
BQ-
BQ+
B
V-
1
2
3
4
5
6
7
8
16
15
14
V+
D
Table 2. Recommended Operating Conditions
Symbol
V+
T
OP
VIN
Parameter/Conditions
Supply voltage
Operating temperature
range
Maximum input voltage
Maximum output voltage
Maximum output current
Min
3.0
-55
0
0
-50
Max
3.6
125
Vdd
Vdd
50
Units
V
°C
V
V
mA
DQ+
DQ-
E-
VOUT
IOUT
PE926C31
13
12
11
10
9
Electrostatic Discharge (ESD) Precautions
CQ-
CQ+
C
When handling this UTSi device, observe the
same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 2.
Latch-Up Avoidance
Table 1. Pin Descriptions
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin
Name
A
AQ+
AQ-
E+
BQ-
BQ+
B
V-
C
CQ+
CQ-
E-
DQ-
DQ+
D
V+
Description
Channel A Input
Channel A Noninverting Ouput
Channel A Inverting Output
Enable, active high
Channel B Inverting Output
Channel B Noninverting Output
Channel B Input
Ground Pin
Channel C Input
Channel C Noninverting Output
Channel C Inverting Ouput
Enable, active low
Channel D Inverting Output
Channel D Noninverting Output
Channel D Input
Supply Pin
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Functional Considerations
The PE926C31 operates at high switching
speeds. In order to obtain maximum
performance, it is crucial that pin 16 be supplied
with a bypass capacitor to ground (pin 8).
Table 3. Truth Table
E+
L
H
X
H
X
E-
H
X
L
X
L
Data
X
L
Q+
Z
L
Q-
Z
H
H
H
L
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 7
Document No. 70-0157-01
│
UltraCMOS™ RFIC Solutions
PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
