PE4244
Product Specification
Figure 3. Pin Configuration (Top View)
V
DD
CTRL
1
2
8
7
RF1
Table 3. Absolute Maximum Ratings
Symbol
V
DD
V
I
T
ST
Parameter/Conditions
Power supply voltage
Voltage on any input
Storage temperature range
Operating temperature
Min
-0.3
-0.3
-65
-40
Max
4.0
V
DD
+
150
85
Units
V
V
°C
°C
GND
GND
4244
GND
RFC
3
4
6
5
T
OP
RF2
P
IN
V
ESD
Input power (50Ω)
ESD voltage (Human Body
30
1500
dBm
V
Table 2. Pin Descriptions
Pin
No.
1
Pin
Name
V
DD
Description
Nominal 3 V supply connection. A by-
pass capacitor (100 pF) to the ground
plane should be placed as close as pos-
CMOS logic level:
High = RFC to RF1 signal path
2
CTRL
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Table 4. DC Electrical Specifications
3
GND
Ground connection. Traces should be
physically short and connected to
Common RF port for switch (Note 1)
RF2 port (Note 1)
Ground Connection. Traces should be
physically short and connected to
Ground Connection. Traces should be
physically short and connected to
RF1 port (Note 1)
Parameter
V
DD
Power Supply Voltage
I
DD
Power Supply Current
V
DD
= 3V, V
CNTL
= 3V
Control Voltage High
Control Voltage Low
Min
2.7
Typ
3.0
250
Max
3.3
500
Units
V
nA
V
4
5
6
RFC
RF2
GND
0.7xV
DD
0.3xV
DD
V
7
GND
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 5. Control Logic Truth Table
Control Voltage
CTRL = CMOS High
CTRL = CMOS Low
8
RF1
Note 1: All RF pins must be DC blocked with an external
series capacitor or held at 0 V
DC
.
Signal Path
RFC to RF1
RFC to RF2
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 7
Document No. 70-0103-03
│
UltraCMOS™ RFIC Solutions
PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
