PE42650A
Product Specification
Thermal Data
Though the insertion loss for this part is very low,
when handling high power RF signals, the part can
get quite hot.
Power Dissipated (W)
Figure 24. Power Dissipation
3.0
1:1 VSWR (50 OhmLoad)
Figure 24 shows the estimated power dissipation for
a given incident RF power level. Multiple curves are
presented to show the effect of poor VSWR
conditions. VSWR conditions that present short
circuit loads to the part can cause significantly more
power dissipation than with proper matching.
Figure 25 shows the estimated maximum junction
temperature of the part for similar conditions.
Note that both of these charts assume that the case
(GND slug) temperature is held at 85C. Special
consideration needs to be made in the design of the
PCB to properly dissipate the heat away from the
part and maintain the 85C maximum case
temperature. It is recommended to use best design
practices for high power QFN packages: multi-layer
PCBs with thermal vias in a thermal pad soldered to
the slug of the package. Special care also needs to
be made to alleviate solder voiding under the part.
2.5
2:1 VSWR (25 OhmLoad)
8:1 VSWR (6.25 OhmLoad)
20:1 VSWR (2.5 OhmLoad)
2.0
INF:1 VSWR (0 OhmLoad)
Reliabil ity Limit
1
.5
1
.0
0.5
0.0
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
RF Power (dBm)
Figure 25. Maximum Junction Temperature
1
45
Max Junction Temperature (C)
1
40
1
35
1:1 VSWR (50 OhmLoad)
Table 6. Theta JC
Parameter
Theta JC (+85°C)
1
30
1
25
1
20
15
1
10
1
1
05
1
00
95
90
85
30
31
2:1 VSWR (25 OhmLoad)
8:1 VSWR (6.25 OhmLoad)
20:1 VSWR (2.5 OhmLoad)
INF:1 VSWR (0 OhmLoad)
Reliabil ity Limit
Min
Typ
15
Max
Units
C/W
32
33
34
35
36
37
38
39
40
41
42 43
44
45
46
RF Power (dBm)
Document No. 70-0267-02
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©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
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