PE4273
Product Specification
Figure 3. Pin Configuration (Top View)
pin 1
Table 4. DC Electrical Specifications
Parameter
Min
2.7
Typ
3.0
8
Max
3.3
50
Units
V
µA
V
RF1
GND
RF2
1
6
V2
RFC
V1
V
DD
Power Supply
Voltage
I
DD
Power Supply Current
(V1 = 3V, V2= 3V)
Control Voltage High
Control Voltage Low
273
2
5
3
4
0.7x V
DD
0.3x V
DD
V
Table 2. Pin Descriptions
Pin
No.
1
2
3
4
5
Latch-Up Avoidance
Description
Pin
Name
RF1
GND
RF2
V1
RFC
RF Port1
4
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
RF Port2
4
Switch control input, CMOS logic level.
RF Common
4
This pin supports two interface options:
Single-pin control mode.
A nominal 3-
volt supply connection is required.
Complementary-pin control mode.
A
complementary CMOS control signal
to V1 is supplied to this pin.
6
V2
Figure 4. Maximum Operating Input Power
5
Note: 4. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
Table 3. Absolute Maximum Ratings
Symbol
V
DD
V
I
T
ST
T
OP
P
IN
Parameter/Conditions
Power supply voltage
Voltage on any input
Storage temperature
range
Operating temperature
range
Input power (50Ω)
ESD Voltage (HBM,
ML_STD 883 Method
3015.7)
ESD Voltage (MM,
JEDEC, JESD22-A114-B)
Min
-0.3
-0.3
-65
-40
Max
4.0
V
DD
+
0.3
150
85
+34
1500
100
Units
V
V
°C
°C
dBm
V
V
Note: 5. Operating within DC limits (Table 4).
V
ESD
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
©2005-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 11
Document No. 70-0174-04
│
UltraCMOS™ RFIC Solutions
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