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PE4308 参数 Datasheet PDF下载

PE4308图片预览
型号: PE4308
PDF下载: 下载PDF文件 查看货源
内容描述: 75欧姆RF数字衰减器5位31分贝, DC - 4.0 GHz的 [75 Ohm RF Digital Attenuator 5-bit, 31 dB, DC - 4.0 GHz]
分类和应用: 衰减器
文件页数/大小: 11 页 / 519 K
品牌: PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
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Product Specification
PE4308
Product Description
The PE4308 is a high linearity, 5-bit RF Digital Step Attenuator
(DSA) covering 31 dB attenuation range in 1dB steps, and is
pin compatible with the PE430x series. This 75-ohm RF DSA
provides both parallel (latched or direct mode) and serial
CMOS control interface, operates on a single 3-volt supply and
maintains high attenuation accuracy over frequency and
temperature. It also has a unique control interface that allows
the user to select an initial attenuation state at power-up. The
PE4308 exhibits very low insertion loss and low power
consumption. This functionality is delivered in a 4x4 mm QFN
footprint.
The PE4308 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Figure 1. Functional Schematic Diagram
Switched Attenuator Array
RF Input
RF Output
75
RF Digital Attenuator
5-bit, 31 dB, DC – 4.0 GHz
Features
Attenuation: 1 dB steps to 31 dB
Flexible parallel and serial programming
interfaces
Latched or direct mode
Unique power-up state selection
Positive CMOS control logic
High attenuation accuracy and linearity
over temperature and frequency
Very low power consumption
Single-supply operation
75
impedance
Pin compatible with PE430x series
Packaged in a 20 Lead 4x4 mm QFN
Figure 2. Package Type
20 Lead 4x4 mm QFN
Parallel Control
Serial Control
Power-Up Control
5
3
Control Logic Interface
2
Table 1. Electrical Specifications @ +25°C, V
DD
= 3.0 V
Parameter
Operation Frequency
Insertion Loss
2
Attenuation Accuracy
1 dB Compression3,4
Input IP3
1,2,4
Return Loss
Switching Speed
Notes: 1.
2.
3.
4.
50% control to 0.5 dB
of final value
Two-tone inputs up to
+18 dBm
Any Bit or Bit
Combination
DC
1.2 GHz
DC
1.2 GHz
1 MHz
1.2 GHz
1 MHz
1.2 GHz
DC
1.2 GHz
Test Conditions
Frequency
Minimum
DC
-
-
30
-
10
-
Typical
1.4
-
34
52
13
-
Maximum
2000
1.95
±(0.2 + 4% of atten setting)
Not to Exceed +0.4 dB
-
-
-
1
Units
MHz
dB
dB
dB
dBm
dBm
dB
µs
Device Linearity will begin to degrade below 1 MHz
Figures on Pages 2 to 4 for data across frequency.
Note Absolute Maximum in Table 3.
Measured in a 50
system.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 11
Document No. 70-0162-03
www.psemi.com