PE83501
Product Specification
Figure 3. Pin Configuration (Top View)
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latch-Up Avoidance
V
DD
1
8
GND
F
in
2
7
F
out
PE83501
DEC
3
6
GND
GND
4
5
GND
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Functional Considerations
The
PE83501
divides a 400 MHz to 3.5 GHz input
signal by two, producing a 200 MHz to 1.75 GHz
output signal. To work properly, pin 3 must be
supplied with a bypass capacitor to ground. In
addition, the input and output signals (pins 2 & 7)
must be AC coupled via an external capacitor, as
shown in the test circuit in Figure 4.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance. See Figure 9 for a layout example.
Table 2. Pin Descriptions
Pin
No.
1
2
Pin
Name
V
DD
F
in
Description
Power supply pin. Bypassing is required.
Input signal pin. DC blocking capacitor
required (15 pF typical)
Power supply decoupling pin. Place a
capacitor as close as possible and connect
directly to the ground plane.
Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
Ground pin.
Ground pin.
Divided frequency output pin. DC blocking
capacitor required (47 pF typical)
Ground pin.
3
DEC
4
5
6
7
8
GND
GND
GND
F
out
GND
Table 3. Absolute Maximum Ratings
Symbol
V
DD
P
in
T
ST
T
OP
V
ESD
Parameter/Conditions
Supply voltage
Input Power
Storage temperature
range
Operating temperature
range
ESD voltage (Human
Body Model)
Min
Max
4.0
15
Units
V
dBm
°C
°C
V
-65
-55
250
150
125
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Exposure
to absolute maximum ratings for extended periods
may affect device reliability.
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 8
Document No. 70-0124-02
│
UltraCMOS™ RFIC Solutions
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