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PE84244-00 参数 Datasheet PDF下载

PE84244-00图片预览
型号: PE84244-00
PDF下载: 下载PDF文件 查看货源
内容描述: 单刀双掷射频MOSFET开关 [SPDT MOSFET RF SWITCH]
分类和应用: 开关射频光电二极管
文件页数/大小: 6 页 / 200 K
品牌: PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
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PE84244
Preliminary Specification
Figure 3. Pin Configuration
V
DD
CTRL
1
2
8
7
RF1
GND
GND
Table 4. DC Electrical Specifications
Parameter
V
DD
Power Supply Voltage
I
DD
Power Supply Current
V
DD
= 3V, V
CNTL
= 3V
Control Voltage High
Control Voltage Low
0.7xV
DD
0.3xV
DD
Min
2.7
Typ
3.0
250
Max
3.3
500
Units
V
nA
V
V
PE84244
GND
RFCommon
3
4
6
5
RF2
Table 5. Control Logic Truth Table
Table 2. Pin Descriptions
Pin No.
1
Control Voltage
Description
CTRL = CMOS High
CTRL = CMOS Low
Signal Path
RFCommon to RF1
RFCommon to RF2
Pin
Name
V
DD
Nominal 3 V supply connection. A
bypass capacitor (100 pF) to the ground
plane should be placed as close as
possible to the pin
CMOS logic level:
High = RFCommon to RF1 signal path
Low = RFCommon to RF2 signal path
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
Common RF port for switch (Note 1)
RF2 port (Note 1)
Ground Connection. Traces should be
physically short and connected to ground
plane for best performance.
Ground Connection. Traces should be
physically short and connected to ground
plane for best performance.
RF1 port (Note 1)
Electrostatic Discharge (ESD) Precautions
When handling this UTSi device, observe the same
precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rating specified.
Latch-Up Avoidance
Unlike conventional CMOS devices, UTSi CMOS
devices are immune to latch-up.
2
CTRL
3
GND
4
5
6
RF
Common
RF2
GND
7
GND
8
RF1
Note 1:
All RF pins must be DC blocked with an external
series capacitor or held at 0V
DC
.
Table 3. Absolute Maximum Ratings
Symbol
V
DD
V
I
T
ST
T
OP
Parameter/Conditions
Power supply voltage
Voltage on any input
Storage temperature range
Operating temperature
range
Min
-0.3
-0.3
-65
-55
Max
4.0
V
DD
+
0.3
150
125
Units
V
V
°C
°C
P
IN
V
ESD
Input power (50Ω)
ESD voltage (Human Body
Model)
30
1500
dBm
V
Copyright
Peregrine Semiconductor Corp. 2003
File No. 70/0129~00A
|
UTSi
CMOS RFIC SOLUTIONS
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