PE9313
Product Specification
Figure 3. Pin Configuration
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
V
DD
1
2
8
7
GND
IN
OUT
PE9313
N/C
3
4
6
5
NC
GND
GND
Table 2. Pin Descriptions
Pin No.
1
2
3
4
5
6
Pin
Name
V
DD
IN
NC
GND
GND
NC
Device Functional Considerations
Description
Power supply pin. Bypassing is required
(eg 1000 pF & 100 pF).
Input signal pin. Should be coupled with a
capacitor (eg 1000 pF).
No connection. This pin should be left
open.
Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
Ground pin.
No connection. This pin should be left
open.
Divided frequency output pin. This pin
should be coupled with a capacitor
(eg 1000 pF).
Ground Pin.
The
PE9313
divides an input signal, up to a
frequency of 1500 MHz, by a factor of eight
thereby producing an output frequency at an
eighth of the input frequency. To work properly at
higher frequency, the input and output signals
(pins 2 & 7) must be AC coupled via an external
capacitor, as shown in the test circuit in Figure 8.
The input may be DC coupled for low frequency
operation with care taken to remain within the
specified DC input range for the device.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance. See Figure 7 for a layout example.
7
8
OUT
GND
Table 3. Absolute Maximum Ratings
Symbol
V
DD
P
in
V
IN
T
ST
T
OP
V
ESD
Parameter/Conditions
Supply voltage
Input Power
Voltage on input
Storage temperature range
Operating temperature
ESD voltage (Human Body
Model, MIL-STD 883)
Min
Max
4.0
15
Units
V
dBm
V
°C
°C
V
-0.3
-65
-40
1000
V
DD
+0.3
150
85
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 7
Document No. 70-0120-02
│
UltraCMOS™ RFIC Solutions
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