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PI49FCT3803QE 参数 Datasheet PDF下载

PI49FCT3803QE图片预览
型号: PI49FCT3803QE
PDF下载: 下载PDF文件 查看货源
内容描述: 1 : 5/1 : 7时钟缓冲器用于网络应用程序 [1:5/1:7 Clock Buffer for Networking Applications]
分类和应用: 时钟
文件页数/大小: 6 页 / 418 K
品牌: PERICOM [ PERICOM SEMICONDUCTOR CORPORATION ]
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PI49FCT3802/PI49FCT3803
1:5/1:7 Clock Buffer
for Networking Applications
Features
• High Frequency >156 MHz
• High-speed, low-noise, non-inverting buffer
- PI49FCT3802 is 1:5 buffer
- PI49FCT3803 is 1:7 buffer
• Low-skew (<250ps) between any two output clocks
• Low duty cycle distortion <250ps
• Low propagation delay <2.5ns
• 5V Tolerant input
• Multiple V
DD
, GND pins for noise reduction
• 3.3V supply voltage
• Packaging (Pb-free & Green available):
- 16-pin TSSOP (L)
- 16-pin QSOP (Q)
Description
The PI49FCT380x is a 3.3V compatible, high-speed, low-noise
non-inverting clock buffer. The key goal in designing the
PI6C380x is to target networking applications that require low-
skew, low-jitter, and high-frequency clock distribution. Providing
output-to-output skew as low as 250ps, the PI49FCT380x is an
ideal clock distribution device for synchronous systems. Designing
synchronous networking systems requires a tight level of skew from
a large number of outputs.
Pin Description
Pin Name
3802
BUF_IN
CLK[0:4]
GND
V
DD
3803
BUF_IN
CLK[0:4]
GND
V
DD
Description
Input
Outputs
GND
Power
Block Diagram (PI49FCT3802)
CLK0
Pin Configuration (PI49FCT3802)
BUF_IN
GND
1
2
3
4
5
6
7
8
16
15
VDD
CLK4
CLK3
GND
CLK1
BUF_IN
CLK2
CLK0
VDD
CLK1
16-Pin
L, Q
14
13
12
11
10
9
CLK2
VDD
NC
GND
CLK3
GND
NC
CLK4
VDD
Block Diagram (PI49FCT3803)
CLK0
Pin Configuration (PI49FCT3803)
BUF_IN
GND
CLK0
CLK2
1
2
3
4
5
6
7
8
16
15
VDD
CLK1
BUF_IN
CLK6
CLK5
GND
VDD
CLK1
16-Pin
L, Q
14
13
12
11
10
9
CLK4
VDD
CLK3
GND
CLK3
GND
CLK2
CLK6
VDD
1
PS8559A
09/14/04