PI5A4624/ PI5A4625
SOT
INY
1-Ohm, Low -Voltage
Single-Supply SPDT Switch
™
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Electrical Specifications - Single +1.8V Supply
(V+ = +1.8V ± 10%, GND = 0V, V
INH
= 1.5V, V
INL
= 0.6V)
Parame te r
Analog Switch
Analog Signal Range
O n- Resistance
(3)
Symbol
Conditions
Te mp. (°C)
M in.
(1)
Typ.
(2)
M ax.
(1)
Units
V
ANALOG
R
ON
V+ =1.8V, I
COM
= –2mA
V
NO
or V
NC
= 1.5V
25
Full
25
V+ =1.8V, I
COM
= –2mA
V
NO
or V
NC
= 0.6V, 1.5V
R
FLAT(ON)
Full
25
Full
0
2.8
V+
4
5
0.44
0.7
0.5
0.9
0.6
0.6
V
O n- Resistance Match
(4)
Between Channels
O n- Resistance Flatness
D ynamic
Turn- O n- Time
∆
R
ON
O hm
t
ON
V+ =1.8V, V
NO
or
V
NC
= 1.5V, Figure 1
25
Full
25
Full
Figure 3 (PI5A4624 O nly)
Figure 4 (PI5A4625 O nly)
C
L
- 1nF, V
GEN
= 0V,
R
GEN
= 0V, Figure 2
25
25
25
1
1
65
70
95
Turn- O ff- Time
Break- Before- Make
Make- Break- Before
Charge Injection
Supply
Positive Supply Current
Logic Input
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
(3)
t
OFF
t
BBM
t
MBB
Q
40
55
70
ns
60
10
10
72
14
pC
I+
V+ = 2.0V, V
IN
=0V or V+
All Channels on or off
Full
0.5
1
µA
V
IH
V
IL
I
INH
I
INL
Guaranteed Logic High Level
Guaranteed Logic LowLevel
V
IN
= 1.5V, all others = 0.8V
V
IN
= 0.8V, all others = 1.5V
Full
Full
Full
Full
1.8
0.6
–1
–1
1
1
V
µA
Notes:
1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet.
2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design.
4.
∆R
ON
= R
ON
max. - R
ON
min.
5. Flatness is defined as the difference between the maximum and minimum value of On-resistance measured.
6
PS8635B
09/13/04