PI6C410B
Clock Generator for Intel
PCI-Express Server
Chipset
Features
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•
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14.318 MHz Crystal Input
Selectable of 100, 133, 166, 200, 266, 333, and 400 MHz
CPU Output Frequencies
SMBus: Power Management Control
Spread Spectrum support (-0.5% down spread)
Packaging (Pb-free & Green):
—56-Pin SSOP (V)
—56-Pin TSSOP (A)
Description
PI6C410B is a high-speed, low-noise clock generator designed to
work with Intel Server PCI-Express Chipset. The Spread Spectrum
PLL based clock generator reduces EMI emission and supports a
wide range of frequencies.
Jitter Performance
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•
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•
< 85ps Cycle-to-Cycle CPU clock jitter
< 350ps Cycle-to-Cycle 48MHz clock jitter
< 500ps Cycle-to-Cycle PCI clock jitter
< 125ps Cycle-to-Cycle SRC clock jitter
< 1000ps Cycle-to-Cycle REF clock jitter
Output Features
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•
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Four Pairs of Differential CPU Clocks
Five Pairs of SRC Clocks
Seven PCI Clocks
One 48 MHz USB clock
Two REF clocks
Skew Performance
• < 100ps Output to output CPU clock skew
• < 500ps Output to output PCI clock skew
• < 250ps Output to output SRC clock skew
Block Diagram
XT AL_IN
XT AL_OUT
XT AL
OSC
PLL 1
SDA
SCL
FS_A
FS_B/TEST_MODE
FS_C/TEST_SEL
VTT_PWRGD#
/PWRDWN
IREF
CONTROL
SM Bus
Logic
DIV
PLL 2
USB_48
Pin Configuration
VDD_PCI
VSS_PCI
PCI_0
PCI_1
PCI_2
PCI_3
VSS_PCI
VDD_PCI
PCIF_0
PCIF_1
PCIF_2
VDD_48
USB_48
VSS_48
VDD_SRC
SRC_0
SRC_0#
SRC_1#
SRC_1
VSS_SRC
SRC_2
SRC_2#
SRC_3#
SRC_3
VDD_SRC
SRC_4
SRC_4#
VDD_SRC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
REF [0:1]
PCI [0:3]
PCIF [0:2]
DIV
SRC [0:4]
SRC [0:4]#
CPU [0:3]
CPU [0:3]#
DIV
FS_C / TEST_SEL
REF_0
REF_1
VDD_REF
XTAL_IN�½
XTAL_OUT
VSS_REF
FS_B/TEST_MODE
FS_A
VDD_CPU
CPU_0
CPU_0#
VDD_CPU
CPU_1
CPU_1#
VSS_CPU
CPU_2
CPU_2#
VDD_CPU
CPU_3
CPU_3#
VDD_A
VSS_A
IREF
NC
VTT_PWRGD# / PWRDWN
SDA
SCL
1
PS8811A
02/01/06
PERICOM [ PERICOM SEMICONDUCTOR CORPORATION ]
