PI6C4512
PLL Clock Multiplier
Features
• Zero ppm multiplication error
• Input crystal frequency range: 5 - 30MHz
• Input clock frequency range: 4 - 50MHz
• Output clock frequencies range ≤ 200MHz
• Period jitter ≤ 100ps (typ)
• 9 Selectable frequencies controlled by S
0
and S
1
pins
• Supply voltage: 3.3V ±10% or 5.0V ±10%
• Packaging (Pb-Free and Green):
—8-pin SOIC (W)
Description
The PI6C4512 is a precision general-purpose clock synthesizer with
fmax≤ 200MHz. The PI6C4512 uses an external low-cost crystal
to generate a very accurate rate and stable system clocks.
Block Diagram
Pin Configuration
S
0
S
1
X1 / ICLK
X2
PLL Clock Synthesis
and
Control Circuit
Output
Buffer
CLK
X1 / ICLK
V
CC
1
2
3
4
8
7
6
5
X2
S
1
S
0
CLK
Crystal
Oscillator
Output
Buffer
REF
GND
REF
Clock Output Table
(1)
S
1
0
0
0
M
M
M
1
1
1
S
0
0
M
1
0
M
1
0
M
1
CLK
x4
x (16/3)
x5
x 2.5
x2
x (10/3)
x6
x3
x8
Notes:
1. M = Mid-level (unconnected, biases to V
CC
/2).
06-0034
1
PS8763B
03/30/06
PERICOM [ PERICOM SEMICONDUCTOR CORPORATION ]
