PI6C48535-01
3.3V Low Skew 1-to-4
LVTTL/LVCMOS to LVPECL Fanout Buffer
Features
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Maximum operation frequency: 500 MHz
4 pair of differential LVPECL outputs
Selectable CLK
0
and CLK
1
inputs
CLK
0
, CLK
1
accept LVCMOS, LVTTL input level
Output Skew: 80ps (maximum)
Part-to-part skew: 150ps (maximum)
Propagation delay: 1.9ns (maximum)
3.3V power supply
Pin-to-pin compatible to ICS8535-01
Operating Temperature: -40
o
C to 85
o
C
Packaging (Pb-free & Green available):
— 20-pin TSSOP (L)
Description
The PI6C48535-01 is a high-performance low-skew LVPECL
fanout buffer. PI6C48535-01 features two selectable single-ended
clock inputs and translates to four LVPECL outputs. The CLK
0
and CLK
1
inputs accept LVCMOS or LVTTL signals. The outputs
are synchronized with input clock during asynchronous assertion/
deassertion of CLK_EN pin. PI6C48535-01 is ideal for single-
ended LVTTL/LVCMOS to LVPECL translations. Typical clock
translation and distribution applications are data-communications
and telecommunications.
Block Diagram
CLK_EN
D
LE
CLK
CLK
1
0
1
Q
0
n
Q
0
Q
1
n
Q
1
CLK_SEL
Q
2
n
Q
2
Q
3
n
Q
3
Pin Configuration
Q
V
EE
CLK_EN
CLK_SEL
CLK
0
NC
CLK
1
NC
NC
NC
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q
0
NQ
0
V
CC
Q
1
NQ
1
Q
2
NQ
2
V
CC
Q
3
NQ
3
1
PS8735A
11/15/05
PERICOM [ PERICOM SEMICONDUCTOR CORPORATION ]
