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PI74LVCC3245ALE 参数 Datasheet PDF下载

PI74LVCC3245ALE图片预览
型号: PI74LVCC3245ALE
PDF下载: 下载PDF文件 查看货源
内容描述: 8位双电源总线收发器可配置输出电压和三态输出 [8-Bit Dual Supply Bus Transceiver with Configurable Output Voltage and 3-State Outputs]
分类和应用: 总线收发器
文件页数/大小: 10 页 / 479 K
品牌: PERICOM [ PERICOM SEMICONDUCTOR CORPORATION ]
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PI74LVCC3245A
8-Bit Dual Supply Bus Transceiver with
Configurable Output Voltage and 3-State Outputs
Product Features
• 2.7V to 3.6V on A-port and 3V to 5.5V on B-port
• Latch-up performance exceeds 200mA Per JESD78
• ESD protection exceeds JESD22
2000V Human-Body Model (A114-B)
200V Machine Model (A115-A)
• Industrial Temperature: –40°C to +85°C
• Packages (Pb-free available):
- 24-pin 173-mil wide plastic TSSOP (L)
(Pb-free & Green available)
- 24-pin 150-mil wide plastic QSOP (Q)
- 24-pin 300-mil wide plastic SOIC (S)
Product Description
Pericom Semiconductor’s PI74LVC series of logic circuits are
produced using the Company’s advanced submicron CMOS tech-
nology, achieving industry leading speed.
The PI74LVCC3245A is a non-inverting 8-bit Bidirectional Trans-
ceiver that uses two seperate power supply rails. A-port (V
CCA
) is set
to operate at 3.3V and B-port (V
CCB
) is set to operate from 3.3V to
5V. This allows for translation from a 3.3V to a 5V environment and
vice-versa. This tranceiver is designed for asynchronous two-way
communication between data buses. The direction control input pin
(DIR) determines the dataflow from the A bus to the B bus or from
the B bus to the A bus. The output enable (OE) input, when HIGH,
disables both A and B ports by placing them in HIGH Z condi-
tion.
Logic Block Diagram
DIR
2
22
Product Pin Configuration
OE
(3.3V) V
CCA
DIR
A1
A2
A3
A4
A5
A6
18
17
16
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCCB (3.3V to 5V)
NC
OE
B1
B2
B3
B4
B5
B6
B7
B8
GND
A
1
3
A
2
4
A
3
5
A
4
6
A
5
7
A
6
8
A
7
9
A
8 10
21
B
1
20
B
2
19
B
3
B
4
B
5
B
6
A7
A8
GND
GND
15
B
7
14
B
8
Product Pin Description
Pin Name
Description
3-State Output Enable Inputs (Active LOW)
Direction Control Input
Side A Inputs or 3-State Outputs
Side B Inputs or 3-State Outputs
NO Internal Connect
Ground
Power
OE
Truth Table
(1)
Inputs
OE
L
L
H
DIR
L
H
X
Bus B Data to Bus A
Bus A Data to Bus B
Z (Isolation)
L = Low Signal Level
Z = High Impedance
Outputs
DIR
Ax
Bx
NC
GND
V
CCA
,V
CCB
Note:
1. H = High Signal Level
X = Don’t Care or Irrelevant
1
PS8702A
09/10/03