PI7C8150B
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
17.2
DC SPECIFICATIONS
Symbol
VDD
Parameter
Supply Voltage
Condition
Min.
3
Max.
3.6
Units
V
Notes
,
AVCC
Vih
Vil
Vih
Vil
Vipu
Iil
Voh
Vol
Voh
Vol
Cin
Input HIGH Voltage
Input LOW Voltage
0.5 VDD
-0.5
0.7 VDD
-0.5
VDD + 0.5
0.3 VDD
VDD + 0.5
0.3 VDD
V
V
V
V
V
μA
V
V
V
3, 4
3, 4
1, 4
1, 4
3
3
3
3
2
2
3
CMOS Input HIGH Voltage
CMOS Input LOW Voltage
Input Pull-up Voltage
Input Leakage Current
Output HIGH Voltage
Output LOW Voltage
CMOS Output HIGH Voltage
CMOS Output LOW Voltage
Input Pin Capacitance
CLK Pin Capacitance
IDSEL Pin Capacitance
Pin Inductance
0.7 VDD
0 < Vin < VDD
Iout = -500μA
Iout = 1500μA
Iout = -500μA
Iout = 1500μA
±10
0.9VDD
0.1 VDD
VDD – 0.5
0.5
10
12
8
V
pF
pF
pF
nH
CCLK
CIDSEL
Lpin
5
3
3
3
20
Notes:
1. CMOS Input pins: S_CFN_L, TCK, TMS, TDI, TRST_L, SCAN_EN, SCAN_TM_L
2. CMOS Output pin: TDO
3. PCI pins: P_AD[31:0], P_CBE[3:0], P_PAR, P_FRAME_L, P_IRDY_L, P_TRDY_L,
P_DEVSEL_L, P_STOP_L, P_LOCK_L, PIDSEL_L, P_PERR_L, P_SERR_L,
P_REQ_L, P_GNT_L, P_RESET_L, S_AD[31:0], S_CBE[3:0], S_PAR, S_FRAME_L,
S_IRDY_L, S_TRDY_L, S_DEVSEL_L, S_STOP_L, S_LOCK_L, S_PERR_L,
S_SERR_L, S_REQ[7:0]_L, S_GNT[7:0]_L, S_RESET_L, S_EN, HSLED, HS_SW_L,
HS_EN, ENUM_L.
4. VDD is in reference to the VDD of the input device.
Page 103 of 108
APRIL 2006 – Revision 2.02
06-0044
PERICOM [ PERICOM SEMICONDUCTOR CORPORATION ]
