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PI90LV02/PI90LVT02
SOTiny
TM
LVDS High-Speed
Differential Line Receiver
Features
• Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard
• Signaling rates up to 400 Mbps
• Interfaces to LVDS, LVPECL
• Bus-Terminal ESD exceeds 10kV
• Differential Input Voltage Threshold less than 100mV
• Typical Propagation Delay Times of 2.6ns
• Typical Power Dissipation of 40mW @200 MHz
• Low Voltage TTL (LVTTL) Level is 5V Tolerant
• Open-Circuit Fail Safe
• Output are High Impedance with V
CC
<1.5V
• Integrated 110-ohm Line Termination Resistor (PI90LVT02)
• Operates from a 3.3V supply
• Input common-mode voltage range 0V–3.2V
• Industrial Temperature Operating Range: –40°C to 85°C
• Packaging (Pb-free & Green available):
- 5-pin space-saving SOT-23 (T)
Description
The PI90LV02 and PI90LVT02 are single differential line receivers
that use low-voltage differential signaling (LVDS) to support data
rates up to 400 Mbps. These products are designed for applications
requiring high-speed, low-power consumption, low-noise genera-
tion, and a small package.
A differential input signal (350mV) is translated by the device to a
3.3V CMOS output level. The PI90LVT02 integrates the terminating
resistor while the PI90LV02 requires an external resistor.
Applications
Applications include point-to-point and multi-drop baseband data
transmissions over impedance media of approximately 100-ohms.
The transmission media can be printed circuit board traces,
backplanes, or cables.
The PI90LV02 and PI90LVT02 and companion line drivers (PI90LV01
and PI90LVB01) provide new alternatives to RS-232, PECL, and ECL
devices for high-speed, point-to-point interface applications.
Logic Diagram
PI90LV02
A
B
3
5
4
ROUT
Pinout
VCC
GND
1
2
3
5
ROUT
PI90LVT02
A
B
3
4
110-ohm
5
ROUT
A
4
B
Function Table
Inputs
V
ID
=V
A
–V
B
V
ID
>50mV
–50mV < V
ID
< 50mV
V
ID
≤
–50mV
O pen
H = high level
L = low level
? = indeterminate
1
PS8659B
09/28/04
Outputs
R
OUT
H
?
L
H
PERICOM [ PERICOM SEMICONDUCTOR CORPORATION ]
