Line a r P ho to d io d e Arra y
Im a g e rs
Table 6. Pinout Description and Capacitance Values of Clocked Phases
Capacitance (pF) (Typ)
Operating Conditions
For optimum performance and longest
life, carefully follow the operational
requirements of these imagers. Provide
stable voltage sources free of noise and
variation and clean waveforms with
controlled edges. Protect the imager
from electrostatic discharge and exces-
sive voltages and temperature. Do not
violate the limits on output register
speed or reduce timing margins below
the minimums.
Pin
Sym
Function
Pixels
2048
1024
512
1
VSS
Amplifier return
50
30
20
2
3
4
5
6
7
8
9
VOut
ø2
Signal output
75
270
350
45
140
180
30
70
90
CCD horizontal phase 2
CCD horizontal phase 1
No connection
No connection
No connection
No connection
No connection
Amplifier drain supply
Light shield/die attach
No connection
No connection
No connection
Antiblooming gate
Photo gate
ø1
N/C
N/C
N/C
N/C
N/C
VDD
LS
Imager Configuration
10
All P-series imagers are constructed
using ceramic packages and optically-
flat windows. Imager die are secured
to precision leadframes by thermal
silver-filled epoxy. Packages are baked
before sealing to elminate moisture,
and tested for seal integrity.
11
12
13
14
15
16
17
18
19
20
N/C
N/C
N/C
øAB
øPG
øTG
VOG
øRG
VRD
70
100
90
8
35
50
50
8
20
25
25
8
Transfer gate
Output gate
Reset gate
7
2
2
Reset drain
Figure 5. Pinout Configuration
V
1
2
20
19
18
17
16
15
14
13
12
11
V
RD
SS
V
Out
Ø
RG
OG
TG
Ø
3
V
H2
H1
4
Ø
Ø
Ø
Ø
N/C
N/C
N/C
N/C
N/C
5
PG
AB
6
7
N/C
N/C
N/C
LS
8
9
V
DD
10
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DSP-101 01H - 7/2002W Page 6
PERKINELMER [ PERKINELMER OPTOELECTRONICS ]
