Philips Semiconductors
Product specification
8-bit parallel-in/serial-out shift register
AC WAVEFORMS
74HC/HCT165
The changing to output assumes internal Q
6
opposite state from Q
7
.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.6
Waveforms showing the clock (CP) to output (Q
7
or Q
7
) propagation delays, the clock pulse width, the
output transition times and the maximum clock frequency.
The changing to output assumes internal Q
6
opposite state from Q
7
.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.7
Waveforms showing the parallel load (PL) pulse width, the parallel load to output (Q
7
or Q
7
) propagation
delays, the parallel load to clock (CP) and clock enable (CE) removal time.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.8 Waveforms showing the data input (D
n
) to output (Q
7
or Q
7
) propagation delays when PL is LOW.
December 1990
9
PHILIPS [ NXP SEMICONDUCTORS ]
