LV77D Series 1.8 V
LVDS Clock Oscillators
April 2007
Electrical Specification for 1.80V +5% over the specified temperature range and
_
the frequency range of 1 to 250 MHz
Item
Frequency Accuracy “45"
“44"
“20"
Output Waveform
Differential Output (V
OD
)
200
0.81
--
45
300
400
Jitter
Vcc Supply Current
Enable/Disable Internal Pull-up
V disable
V enable
Output leakage
Enable
Disable time
Start up time
Operating Temperature Range
Storage Temperature Range
Standby Current I
CC
V
OUT
= V
CC
V
OUT
= 0V
-
-
-
50
-
1.54
-20
-20
-
-
-
-
-10
-40
-55
2
Min
-50
-25
-20
Max
+50
+25
+20
LVDS
450
1.38
50
55
700
900
0.6
2.8
35
-
0.18
-
+20
+20
10
10
5
3
+70
+85
+125
3
mA
Kohm
Volts
Volts
uA
uA
nS
nS
mS
mS
o
o
o
Unit
ppm
Condition
For all supply voltages, load changes, aging for 1
year, shock, vibration and temperatures
mVolts
Volts
mVolts
%
pS
pS
pS RMS
Referenced to 50% of amplitude or crossing point
> 80 MHz
< 80 MHz
Vth is 20% and 80% of waveform
See load circuit
R1 = 50 ohms
*
Output Offset Voltage (V
OS
)
Differential Output Error (dV
OS
)
Output Symmetry
Output T
RISE
and T
FALL
Measured from 12KHz to 20MHz from Fnominal
Measured from 10Hz to 1MHz from Fnominal
Includes current of properly terminated device
To Vcc (equivalent resistance)
Referenced to Ground
Pad 1 low, device disabled
Time for output to reach a logic state
Time for output to reach a high Z state
> 80 MHz
< 80 MHz
Measured from the time
Vcc = 2.2V
C
C
C
Standard Temperature Range
Extended Temperature Range
Pad 1 low, device disabled
“E” Option
mA
*
Output Offset Voltage is within proper range of LVDS inputs
Specifications with Pad 1 E/D open circuit
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425-776-1880
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PLETRONICS [ PLETRONICS, INC. ]
