SM55J Series 1.8 V
CMOS Clock Oscillators
March 2013
Mechanical:
Inches
A
B
C
D
1
E
1
F
1
G
1
H
1
I
1
J
1
Not to Scale
1
mm
5.00 _ 0.15
+
3.20 _ 0.15
+
1.15 _ 0.10
+
1.23
2.54
0.10
1.27
1.40
0.60
0.10R
0.020R
0.197 _ 0.006
+
0.126 _ 0.006
+
0.045 _ 0.004
+
0.048
0.100
0.004
0.050
0.055
0.024
0.004
0.008
Typical dimensions
K
1
Contacts :
Gold 11.8 to 39.4 µinches (0.3 to 1.0 µm) over Nickel 50 to 350 µinches (1.27 to 8.89 µm)
Pad
1
Function
Output
Enable/Disable
Ground (GND)
Output
Supply Voltage
(V
CC
)
Note
When this pad is not connected the oscillator shall operate.
When this pad is logic low the output will be inhibited (high impedance state.)
Recommend connecting this pad to V
CC
if the oscillator is to be always on.
2
3
4
Recommend connecting appropriate power supply bypass capacitors as close as
possible.
Layout and application information
For Optim um Jitter Perform ance, Pletronics recom m ends:
•
a ground plane under the device
•
no large transient signals (both current and voltage) should be routed under the device
•
do not layout near a large m agnetic field such as a high frequency switching power supply
•
do not place near piezoelectric buzzers or m echanical fans.
www.pletronics.com
425-776-1880
6
PLETRONICS [ PLETRONICS, INC. ]
