SM77D Series 5.0 V
CMOS Clock Oscillators
Feb 2008
Mechanical:
Inches
mm
A
0.276 +_0.006
7.00 +_0.15
B
C
0.197 +_0.006
0.068 +_0.018
5.00 +_0.15
1.73 +_0.44
0.96
D1 0.038
E1 0.200
5.08
F1
0.004
0.10
G1 0.050
H1 0.055
1.27
1.40
I1
0.024
0.004
0.60
J1
0.10R
0.020R
Not to Scale
Contacts :
K1 0.008
1 Typical dimensions
Gold 11.8 μinches 0.3 μm minimum over Nickel 50 to 350 μinches 1.27 to 8.89 μm
Pad
Function
Note
1
Output
When this pad is not connected the oscillator shall operate.
Enable/Disable
When this pad is logic low the output will be inhibited (high impedance state.)
Recommend connecting this pad to VCC if the oscillator is to be always on.
2
3
4
Ground (GND)
Output
Supply Voltage
(VCC)
Recommend connecting appropriate power supply bypass capacitors as close as
possible.
Layout and application information
For Optimum Jitter Performance, Pletronics recommends:
•
•
•
•
a ground plane under the device
no large transient signals (both current and voltage) should be routed under the device
do not layout near a large magnetic field such as a high frequency switching power supply
do not place near piezoelectric buzzers or mechanical fans.
www.pletronics.com
425-776-1880
6
PLETRONICS [ PLETRONICS, INC. ]
