Preliminary
PL623-38
Low Phase Noise XO (for 3
rd
O.T.) For 65-130MHz
FEATURES
•
•
•
•
•
•
Input: 65-130MHz
Overtone or fundamental
Crystal
Output frequency: Up to 130MHz
Selectable /2, /4, /8 output dividers with 60KΩ
pull up resistor on the selector pins
Available output: PECL
Supports 2.5V or 3.3V-Power Supply
Available in die form
3
rd
DIE CONFIGURATION
57.5 mil
GNDOSC
18
VDDOSC
VDDANA
VDDBUF
^SEL0
17
^ SEL1
16
(1460,1435)
15
14
13
12
OECTRL
XIN
56.5 mil
19
OESEL (pull down)
VDDBUF
VDDBUF
Q
Q
GNDBUF
20
10
9
11
XOUT
21
8
DESCRIPTION
PL623-38 is an XO IC specifically designed to work
with high frequency 3
rd
overtone or fundamental
crystals from 65MHz to 135MHz. It requires an
external resistor for the 3
rd
overtone selection. Its
design was optimized to tolerate higher limits of
inter-electrodes capacitance and bonding
capacitance to improve yield. It achieves very low
current into the crystal resulting in better overall
stability. It is ideal for XO applications requiring
PECL output levels at high frequencies.
Y
X
Die ID: C560A-FFFF-FP
OECTRL
22
1
2
3
4
5
6
7
(0,0)
GNDOSC
GNDANA
GNDASHIELD
Note: ‘^’ Denotes 60kΩ pull-up resistor
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
57.5 x 56.5 mil
GND
80 micron x 80 micron
10 mil
GNDOSC
GNDBSHIELD
GNDBUF
BLOCK DIAGRAM
OECTRL
Q
XIN
3
rd
OT
Resistor
OE SELECTION
Pad #12
OESEL
1
Pad #22
OECTRL
0
1
0
1
State
Tri-state
Output enabled (default)
Output enabled (default)
Tri-state
Oscillator
Amplifier
Q
PL623-38
XOUT
0
(default)
Pad #12: Bond to VDD to set to “1”
Pad #22: Logical states defined by PECL levels
OUTPUT DIVIDER SELECTOR LOGIC
SEL 0
0
1
0
1
SEL1
0
0
1
1
Output
No Divider
Divide by 2
Divide by 4
Divide by 8
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
www.phaselink.com
Rev 05/03/05 Page 1
PLL [ PHASELINK CORPORATION ]
