PL611-25
Programmable Quick Turn Clock
T M
FEATURES
Advanced programmable PLL design
Very low Jitter and Phase Noise (< 40ps Pk-Pk typical)
Two registers banks for 2-time programming.
Output frequency up to 200MHz CMOS.
Crystal inputs:
o
Fundamental crystal: 10MHz-30MHz
o
3
RD
overtone crystal: Up to 75MHz
•
Single 2.5V or 3.3V ± 10% power supply
•
Operating temperature range from -40°C to 85°C
•
Available in Die form only
•
•
•
•
•
PAD LAYOUT AND DIE ID
XIN
OE
GND
GND
CLK1
1
2
3
4
5
6
VDD
9
Die ID:
C611A-
8
0505-05D
7
XOUT
DNC
VDD
DIE AND WAFER SPECIFICATION
Name
Die Size
Reverse side
Pad Opening
Wafer Diameter
Die Per Wafer
Wafer Thickness
GND
80 micron x 80 micron
8”
22,277
12 mil
Value
31.5x55.1 mil
DESCRIPTION
The PL611-25 is a low-cost general purpose
frequency synthesizer and a member of PhaseLink’s
Factory Programmable ‘Quick Turn Clock (QTC)’
family. PhaseLink’s PL611-25 product family can
generate any output frequency up to 200 MHz from
fundamental crystal input between 10 MHz - 30 MHz,
or a 3rd overtone crystal of up to 75Mhz.
BLOCK DIAGRAM
XIN/FIN
XOUT
Xtal
OSC
R-counter
(8-bit)
Phase
Detector
M -counter
(10-bit)
Charge
Pump
Loop
Filter
Programmable
CLoad
F
VCO
= F
Ref.
* (2 * M /R)
P-counter
(5-bit)
Programmable Function
VCO
F
Out
= F
VCO
/ (2 * P)
CLK1
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
Rev 10/05/05 Page 1
PLL [ PHASELINK CORPORATION ]
