PL611-07
Programmable Quick Turn Clock
T M
FEATURES
Advanced programmable PLL design
Very low Jitter and Phase Noise (30-70ps Pk-Pk typical)
Up to 2 programmable outputs
Output frequency up to 75MHz CMOS
Programmable Output Enable (OE) pin
Accepts Crystal clock input
o
Fundamental crystal: 10MHz-30MHz
o
Reference input: Up to 100MHz
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Single 2.5V or 3.3V ± 10% power supply
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Operating temperature range from -40°C to 85°C
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Available in 6-pin SOT Green/RoHS compliant Pkg.
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PIN CONFIGURATION
CLK1
GND
XIN/FIN
1
2
3
6
5
4
VDD
CLK2, OE
XOUT
SOT- 23
PL611-07
DESCRIPTION
The PL611-07 is a low-cost general purpose
frequency synthesizer and a member of PhaseLink’s
Programmable ‘Quick Turn Clock (QTC)’ family.
PhaseLink’s PL611-07 offers generating two system
clock frequencies of up to 75MHz form a 10-30MHz
fundamental crystal or a Reference clock source.
One clock output can be programmed to operate as
OE or be used as a Reference output. Cascading of
the ICs to produce additional clock frequencies is
also supported.
PIN DESCRIPTION
Name
CLK1
GND
XIN/FIN
XOUT
CLK2,
OE
VDD
Pin
#
1
2
3
4
5
6
Type
O
P
I
O
B
P
Description
Programmable Clock Output
GND connection
Crystal or Reference input
pin
Crystal output pin
Programmable Clock or
Reference Output, or OE
VDD connection
(2.25~3.63V)
BLOCK DIAGRAM
XIN/FIN
XOUT
Xtal
OSC
FRef
R-counter
(8-bit)
Phase
Detector
M -counter
(10 -bit)
Charge
Pump
Loop
Filter
F
VCO
= F
Ref.
* (2 * M /R)
P-counter
(5-bit)
Selectable
/1,/2,/4,/8
VCO
F
out
= F
VCO
/ (2 * P)
CLK[1:2]
Selectable
/1,/2
Programmable Function
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 08/17/05 Page 1