PL611-01
Programmable Quick Turn Clock
T M
FEATURES
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Advanced programmable PLL design
Very low Jitter and Phase Noise (30-70ps Pk-Pk typical)
Up to 3 programmable outputs
Output frequency up to 200MHz CMOS.
Accepts Crystal or reference clock inputs
o
Fundamental crystal: 10MHz-30MHz
o
3
RD
overtone crystal: Up to 75MHz
o
Reference input: Up to 200MHz
Accepts <1.0V reference signal input voltage
One programmable I/O pin can be configured as
Programmable clock, or Frequency Selection input,
or output Enable (OE) or Power Down (PDB) input.
Single 2.5V or 3.3V ± 10% power supply
Operating temperature range from -40°C to 85°C
Available in 8-pin MSOP/SOIC, and 6-pin SOT Green/
RoHS compliant Packages
PIN CONFIGURATION
XIN/FIN
GND
CLK0
CLK1
1
8
XOUT
CLK2,OE,PDB,FSEL
NC
VDD
PL611-01
SOP-8
MSOP-8
2
3
4
7
6
5
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CLK1
GND
XIN/FIN
1
2
3
6
5
4
VDD
CLK2,OE,PDB,FSEL
XOUT
SOT-6
PL611-01
DESCRIPTION
The PL611-01 is a low-cost general purpose frequency synthesizer and a member of PhaseLink’s Factory
Programmable ‘Quick Turn Clock (QTC)’ family. PhaseLink’s PL611-01 product family offers the versatility of
using a single Crystal or Reference Clock input and producing up to three different system clocks. They can
generate any output frequency up to 200 MHz from fundamental crystal input between 10 MHz - 30 MHz, or a 3rd
overtone crystal of up to 75Mhz, or a Reference clock input of up to 200 MHz. Cascading of the ICs to produce
additional clock frequencies is also supported.
BLOCK DIAGRAM
XIN/FIN
XOUT
Xtal
OSC
FRef
R-counter
(8-bit)
Phase
Detector
M -counter
(10-bit)
Charge
Pump
Loop
Filter
F
VCO
= F
Ref.
* (2 * M /R)
P-counter
(5-bit)
Selectable
/1,/2,/4,/8
VCO
Programming
Logic
FSEL
OE
PDB
CLoad
F
out
= F
VCO
/ (2 * P)
CLOCK[0:2]
Selectable
/1,/2
Programmable Function
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
Rev 09/27/05 Page 1
PLL [ PHASELINK CORPORATION ]
