(Preliminary)
PL611s-06
Low-Power Programmable Quick Turn Clock
T M
FEATURES
•
Advanced low-power, space saving programmable
PLL design
•
Very low Jitter and Phase Noise (30-70ps Pk-Pk typical)
•
Up to 2 programmable clock outputs
•
CMOS output frequency up to 35MHz.
•
Accepts Crystal or Ref Clock input
o
Fundamental Crystal: 10MHz to 30MHz
o
Reference Input: 1MHz to 100MHz
•
Accepts >0.1V reference signal input voltage
•
Single 1.8V, 2.5V, or 3.3V ± 10% power supply
•
Operating temperature range from -40°C to 85°C
•
Available in 6-pin DFN, SC70, and SOT23,
GREEN
/RoHS
compliant packages
DESCRIPTION
The PL611s-06 is a low-power general purpose
frequency synthesizer and a member of PhaseLink’s
Programmable ‘Quick Turn Clock (QTC)’ family.
PhaseLink’s PL611s-06 can generate two system
clock frequencies of up to 35MHz from a 10MHz to
30MHz fundamental crystal or a 1MHz to 100MHz
Reference clock source. The PL611s-06 offers the
best phase noise and jitter performance, and power
consumption of its rivals. Cascading of the ICs to
produce additional clock frequencies is also
supported.
PACKAGE PIN CONFIGURATION
OE, CLK1
GND
PL611s-06
1
2
3
6
5
4
CLK0
VDD
XOUT
GND
XIN, FIN
1
2
3
6
5
4
CLK0
VDD
XOUT
PL611s-06
PL611s-06
PL611s-06
PL611s-06
PL611s-06
PL611s-06
PL611s-06
XIN, FIN
OE, CLK1
GND
1
2
3
6
5
4
XOUT
VDD OE, CLK1
CLK0
XIN, FIN
DFN-
DFN-6L
(2.0mmx1.3mmx0.6mm)
mmx1 mmx0 mm)
SC70-
SC70-6L
70
(2.3mmx2.25mmx1.0mm)
mmx2 25mmx1 mm)
mmx
SOT23-
SOT23-6L
23
(3.0mmx3.0mmx1.35mm)
mmx3 mmx1 35mm)
mm
BLOCK DIAGRAM
XIN/FIN
XOUT
XTAL
OSC
Programmable
CLoad
F
REF
R-Counter
(8-bit)
M-Counter
(11-bit)
Phase
Detector
Charge
Pump
Loop
Filter
F
VCO
= F
REF
* (2 * M/R)
VCO
P-Counter
(5-bit)
F
OUT
= F
VCO
/ (2 * P)
Programmable Function
CLK
Programming
Logic
OE, CLK1
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 12/12/06 Page 1