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PL611S-02-XXXGC-R 参数 Datasheet PDF下载

PL611S-02-XXXGC-R图片预览
型号: PL611S-02-XXXGC-R
PDF下载: 下载PDF文件 查看货源
内容描述: 1.8V - 3.3V PicoPLLTM ,世界上最小的可编程时钟 [1.8V-3.3V PicoPLLTM, World’s Smallest Programmable Clock]
分类和应用: 晶体信号电路锁相环或频率合成电路外围集成电路光电二极管时钟
文件页数/大小: 8 页 / 215 K
品牌: PLL [ PHASELINK CORPORATION ]
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(Preliminary)
PL611s-02
1.8V-3.3V PicoPLL
TM
, World’s Smallest Programmable Clock
FEATURES
Lowest-power, smallest Programmable PLL
Very low Jitter and Phase Noise
Output Frequency up to:
o
133MHz @ 1.8V operation
o
166MHz @ 2.5V operation
o
200MHz @ 3.3V operation
Input Frequency:
o
Fundamental Crystal: 10MHz to 50MHz
o
Reference Clock: 1MHz to 200MHz
Accepts >0.1V reference signal input voltage
One I/O pin can be configured as Output Enable (OE),
Frequency switching (FSEL), Power Down (PDB)
input, or CLK1 output.
<10 A current consumption with PDB active.
Single 1.8V, 2.5V, or 3.3V ± 10% power supply
Operating temperature range from -40°C to 85°C
Available in 6-pin DFN, SOT23, and SC70
GREEN/RoHS
compliant packages.
DESCRIPTION
The PL611s-02 is a low-power, small form factor,
high performance OTP-base programmable
frequency synthesizer and a member of PhaseLink’s
PicoPLL Factory Programmable ‘Quick Turn Clocks.
Designed to fit in a small DFN, SC70, or SOT23
package for a broad range of applications, the
PL611s-02 offers the best phase noise and jitter
performance, and power consumption of its rivals. .
In addition, one programmable I/O pin can be
configured as Output Enable (OE), Frequency
switching (FSEL), Power Down (PDB) input, or CLK1
(F
OUT
, F
REF
, F
REF
/2) output. The power down
feature of PL611s-02, when activated, allows the IC
to consume less than 10 A of power, while its
programming flexibility allows generating any output,
up to 200MHz using a low-cost crystal or reference
input.
PACKAGE PIN CONFIGURATION
GND
XIN/FIN
OE, PDB, FSEL, CLK1
GND
1
2
3
6
5
4
XOUT
VDD
CLK0
611s-02
1
2
3
6
5
4
CLK0
VDD
XOUT
OE, PDB,
FSEL, CLK1
GND
XIN/FIN
PL611s-02
1
2
3
6
5
4
CLK0
VDD
XOUT
PL611s-02
OE, PDB,
FSEL, CLK1
XIN/FIN
DFN-
DFN-6L
(2.0mmx1.3mmx0.6mm)
SC70-
SC70-6L
70
(2.3mmx2.25mmx1.0mm)
SOT23-
SOT23-6L
23
(3.0mmx3.0mmx1.35mm)
BLOCK DIAGRAM
XIN/FIN
XOUT
XTAL
OSC
Programmable
CLoad
F
REF
R-Counter
(8-bit)
M-Counter
(11-bit)
Phase
Detector
Charge
Pump
Loop
Filter
F
VCO
= F
REF
* (2 * M/R)
VCO
P-Counter
(5-bit)
F
OUT
= F
VCO
/ (2 * P)
Programmable Function
CLK0
Programming
Logic
OE, PDB,
FSEL, CLK1
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 12/12/06 Page 1