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PL611S-26-XXXTC-R 参数 Datasheet PDF下载

PL611S-26-XXXTC-R图片预览
型号: PL611S-26-XXXTC-R
PDF下载: 下载PDF文件 查看货源
内容描述: 1.8V - 3.3V PicoPLLTM可编程时钟 [1.8V-3.3V PicoPLLTM Programmable Clock]
分类和应用: 光电二极管时钟
文件页数/大小: 8 页 / 199 K
品牌: PLL [ PHASELINK CORPORATION ]
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(Preliminary)
PL611s-26
1.8V-3.3V PicoPLL
TM
Programmable Clock
FEATURES
Advanced One Time Programmable (OTP) PLL design
Programmable PLL or direct oscillation operation
Very low Jitter and Phase Noise (30-70ps Pk-Pk
typical)
Output Frequency up to
o
133MHz @ 1.8V operation
o
166MHz @ 2.5V operation
o
200MHz @ 3.3V operation
Reference Input Frequency: 1MHz to 200MHz
Accepts >0.1V reference signal input voltage
Low current consumption, <10 A when PDB is
activated
One programmable I/O pin can be configured as
Output Enable (OE),Power Down (PDB) input or an
additional clock output (CLK1).
Frequency Switching (FSEL) capability
Single 1.8V, 2.5V, or 3.3V ± 10% power supply
Operating temperature range from -40°C to 85°C
Available in 6-pin SOT23 and DFN
GREEN/RoHS
compliant packaging
DESCRIPTION
The PL611s-26 is a general purpose frequency
synthesizer and a member of PhaseLink’s PicoPLL
TM
product family. Designed to fit in a small 6-pin DFN
or 6-pin SOT package for high performance
applications, the PL611s-26 offers very low phase
noise, jitter, and power consumption, while offering
up to 2 clock outputs.. The Frequency Switching
(FSEL) capability of PL611s-26 allows for
programming two sets of frequencies, while the
power down feature of PL611s-26, when activated,
allows the IC to consume less than 10 A of power.
PL611s-26’s programming flexibility allows
generating any output using Reference input signal.
BLOCK DIAGRAM
FIN
F
REF
R-Counter
(8-bit)
M-Counter
(11-bit)
Phase
Detector
Charge
Pump
Loop
Filter
F
VCO
= F
REF
* (2 * M/R)
VCO
P-Counter
(5-bit)
F
OUT
= F
VCO
/ (2 * P)
Programmable Function
CLK0
FSEL
Programming
Logic
OE, PDB,
CLK1
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 12/12/06 Page 1