(Preliminary)
1.8V-3.3V PicoTreo
TM
, 3-PLL, 200MHz, 5 Output Clock IC
FEATURES
Designed for PCB space savings with 3 low-power
Programmable PLLs and up to 5 clock outputs.
Low-power consumption (<10µA when PDB is activated)
Output Frequency:
o
<133MHz @ 1.8V operation
o
<166MHz @ 2.5V operation
o
<200MHz @ 3.3V operation
Input Frequency:
o
Fundamental Crystal: 10MHz - 50MHz
o
Reference Input: 1MHz - 200MHz
Programmable I/O pins can be configured as Output
Enable (OE), Power Down (PDB) inputs,
Configuration Select (CSEL) or Clock outputs.
Disabled outputs programmable as HiZ or Active Low
Two distinct configurations selectable with CSEL
(MSOP-10L Only)
Single 1.8V ~ 3.3V, ± 10% power supply
Operating temperature range from -40C to 85C
Available in GREEN/RoHS compliant 8-pin SOP or
10-pin MSOP packages.
DESCRIPTION
The PL613-05 is an advanced triple PLL design
based on PhaseLink’s PicoPLL
TM
, world’s smallest
programmable clock, technology. This flexible
programmable architecture is ideal for high
performance, low-power, low-cost applications. When
using the power down (PDB) feature the PL613-05
consumes less than 10 µA of power, while its
Configuration Select (CSEL) function allows switching
of 2 programmable configurations. Besides its small
form factor and 3 or 5 outputs that can reduce overall
system costs, the PL613-05 offers superior phase
noise, jitter and power consumption performance.
BLOCK DIAGRAM
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 7/2/07 Page 1
PLL [ PHASELINK CORPORATION ]
