PLL501-01/-03
VCXO Clock Generator IC
FEATURES
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Integrated voltage-controlled crystal oscillator
circuitry (VCXO) (pull range 200ppm minimum).
Ideal for ADSL (35.328MHz) and Set-Top Box
and multimedia (27MHz) applications.
VCXO tuning range: 0-3.3V.
Uses inexpensive fundamental-mode parallel
resonant crystals (from 10 to 20MHz).
Integrated phase-locked loop (PLL) provides
pullable output frequency at 2x (PLL501-01) and
4x (PLL501-03) crystal frequency.
3.3V supply voltage.
Small circuit board footprint (8-pin 0.150’’ SOIC).
12mA output drives capability at TTL level.
PIN CONFIGURATION
XIN
VDD
VIN
GND
1
2
3
4
8
7
6
5
XOUT
GND
VDD
CLK
Table 1: Crystal / Output Frequencies
DEVICE
PLL501-01
PLL501-03
F
XIN
(MHz)
10 - 20
10 - 15
CLK (MHz)
2 x F
XIN
4 x F
XIN
PLL501-XX
DESCRIPTIONS
The PLL501-01 and PLL501-03 are monolithic low
jitter, high performance CMOS VCXO chips. They
allow the control of the output frequency with an
input voltage (VIN), using a low cost crystal.
While the PLL501-03 provides a pullable output
clock 4 times the input crystal frequency, the
PLL501-01 provides a pullable output clock 2x the
input crystal frequency. This makes the PLL501-01
ideal for 35.328MHz ADSL applications (using
17.664MHz crystal) and for 27MHz Set-Top Box /
multimedia applications (with a 13.5MHz crystal).
Note:
Contact PhaseLink for custom PLL Frequencies
BLOCK DIAGRAM
XIN
VCXO
PLL
XOUT
VIN
Output
Buffer
CLK
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 05/10/01 Page 1
PLL [ PHASELINK CORPORATION ]
