PLL520-28/-29
Low Phase Noise VCXO (for 120-200MHz Fund Xtal)
FEATURES
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120MHz to 200MHz Fundamental Mode Crystal.
Output range: 120 – 200MHz (no PLL).
Low Injection Power for crystal 50uW.
Sub 0.5pS RMS phase jitter ( 12kHz to 20MHz ).
PECL (PLL520-28) or LVDS output (PLL520-29).
Integrated variable capacitors.
Supports 2.5V or 3.3V-Power Supply.
Available in 16-Pin (TSSOP or 3x3mm QFN).
PIN CONFIGURATION
(Top View)
VDD
XIN
XOUT
N/C
N/C
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
N/C
N/C
GND
CLKC
VDD
CLKT
N/C
N/C
PLL 520-2x
DESCRIPTION
The PLL520-28/-29 are a family of VCXO IC’s
specifically designed to pull high frequency
fundamental crystals. They achieve very low current
into the crystal resulting in better overall stability.
Their internal varicaps allow an on chip frequency
pulling, controlled by the VCON input. Their very
low jitter makes them ideal for the most demanding
timing requirements.
OE
VCON
GND
VDD
VDD
N/C
10
XIN
XOUT
N/C
OE
12
13
14
15
16
1
11
N/C
9
8
7
6
5
GND
CLKC
VDD
CLKT
P520-2x
2
3
4
GND
GND
OE
VCON
Oscillator
XIN
XOUT
Q
Q
OUTPUT ENABLE LOGICAL LEVELS
Part #
PLL520-28
PLL520-29
OE
0 (Default)
1
0
1 (Default)
State
Output enabled
Tri-state
Tri-state
Output enabled
Amplifier
w/
integrated
varicaps
PLL520-28/-29
OE input: Logical states defined by PECL levels for PLL520-28
Logical states defined by CMOS levels for PLL520-29
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/20/04 Page 1
VCON
GND
BLOCK DIAGRAM
PLL [ PHASELINK CORPORATION ]
