PLL602-14
192MHz – 400MHz Low Phase Noise LVDS XO (12 – 25MHz Crystal)
FEATURES
•
•
•
•
•
•
•
Low phase noise output for the 192MHz to
400MHz range (-134 dBc at 10kHz offset).
LVDS output.
12 to 25MHz crystal input.
Integrated crystal load capacitor: no external
load capacitor required.
Output Enable selector.
3.3V operation.
Available in 16 Pin TSSOP.
PIN CONFIGURATION
VDD
VDD
XIN
XOUT
OE^
N/C
GND
GND
1
2
16
15
VDD
GND_BUF
CLKBAR
VDD_BUF
CLK
GND_BUF
GND
GND
PLL 602-14
3
4
5
6
7
8
14
13
12
11
10
9
Note: ^ denotes internal pull up
DESCRIPTION
The PLL602-14 is a monolithic low jitter and low
phase noise (-134dBc/Hz @ 10kHz offset) XO IC
with LVDS output, for 192MHz to 400MHz output
range. It provides a low phase noise reference
frequency using a low cost crystal.
The chip delivers an output frequency of F
XIN
x 16.
This makes the PLL602-14 ideal for a wide range of
applications.
F
OUT
= F
X IN
x 16
OE (Pin 5)
0
1 (Default)
Output State
Tri-state
Output enabled
BLOCK DIAGRAM
VCO
Divider
Reference
Divider
Phase
Comparator
Charge
Pump
Loop
Filter
VCO
CLKBAR
CLK
XIN
XOUT
XTAL
OSC
OE
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 1
PLL [ PHASELINK CORPORATION ]
