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OXPCIE200-TAAG 参数 Datasheet PDF下载

OXPCIE200-TAAG图片预览
型号: OXPCIE200-TAAG
PDF下载: 下载PDF文件 查看货源
内容描述: PCI Express的多端口网桥 [PCI Express multi-port bridge]
分类和应用: 总线控制器微控制器和处理器外围集成电路数据传输PC
文件页数/大小: 2 页 / 154 K
品牌: PLX [ PLX TECHNOLOGY ]
 浏览型号OXPCIE200-TAAG的Datasheet PDF文件第2页  
OXPCIe200, PCI Express multi-port bridge
Highlights
General Features
o
Dual USB 2.0 host ports or USB 2.0 host port &
SPI/SRAM port, both with UART port configuration
o
PCIe x1 end-point
-
Integrated 2.5 GT/s SerDes
o
9 x 9mm
2
, 156-pin TAPP package
o
Typical Power: 300 mWatts
Part of the
Expresso
family of high performance PCI
Express devices, the OXPCIe200 is a single chip
multi-port bridge with a rich set of connectivity ports
and advanced system management to maximize data
throughput while substantially reducing CPU and
system loading.
A fully integrated, single lane PCI Express endpoint
controller and SerDes enables host system access to
USB2.0 host, SPI and SRAM ports, a PLX
Technology’s ultra high performance Oxford 950
UART, plus user defined GPIOs/PWMs. The device
is configurable as dual USB host ports or one USB2.0
host port & one SPI or SRAM port providing a high
throughput communication path from a PCI Express
host system to a slave processor or peripherals.
Complete with the Oxide development tools and
certified device drivers, the OXPCIe200 is easy to
design-in and the ideal connectivity solution for a
diverse range of products including: inter-processor
communication, device control, I/O expansion and
multi-modem ExpressCard modules.
Accelerate your product development and time to
market with Oxide and PLX Technology’s easy to
design-in, high performance serial connectivity
solutions that just work.
Key Features
o
Standards Compliant
-
PCI Express Base Specification, r1.1 (backwards
compatible with PCIe r1.0a)
-
PCI Power Management Spec, r1.2
-
ExpressCard, Mini Card & AIC compatible
-
MSI/MSI-X compatible
-
ASPM (L0S, L1) Link power management
o
High Performance
-
EHCI/OHCI compliant USB 2.0 ports
-
Integrated USB2.0 full speed Phy
-
Master or slave mode SPI or SRAM port
-
Data rates of 60Mbps (SPI) & 25MB/s (SRAM)
-
8KB slave memory with direct access or 16 channel
FIFO modes
-
PLX’s Oxford 950 UART
-
DMA/bus mastering of both UARTs
-
Asynchronous baud rates up to 15 Mbps
-
128-byte deep transmit/receive FIFO
-
9, 8, 7, 6 & 5-bit data framing
-
Automated in & out-of-band flow control
-
Advanced FIFO fill management
o
Flexibility
-
RS232, RS422, RS485 and IrDA operation
-
Flexible clock pre-scaler from 1 to 31.875
-
Programmable RS485 Turn-around delay
-
450 through 950 software compatibility
-
8 user-configurable GPIOs/PWMs
-
Device parameters configurable via EEPROM
-
1.8V, 2.5V or 3.3V UART & GPIO I/O voltage
o
Robust Operation
-
Operation from a single 3.3 V supply
-
Industrial temperature range -40°C to 85°C
o
Broad Device Driver Support
-
Windows 7/Vista/XP/2K
-
WinCE 4.2/5.0/6.0
-
Linux 2.4/2.6
© PLX Technology, www.plxtech.com
Page 1 of 2
7/10/2009, Version 1.1