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OXU210HP 参数 Datasheet PDF下载

OXU210HP图片预览
型号: OXU210HP
PDF下载: 下载PDF文件 查看货源
内容描述: 局部总线高速USB主机,外设/ OTG控制器 [Local bus to Hi-Speed USB Host, Peripheral/OTG controller]
分类和应用: 控制器
文件页数/大小: 1 页 / 96 K
品牌: PLX [ PLX TECHNOLOGY ]
   
OXU210HP, Local bus to Hi-Speed USB Host, Peripheral/OTG controller
Highlights
General Features
o
Compatible with the USB
Specification, Revision 2.0 for high-
speed (480 Mb/s), full-speed (12 Mb/s),
and low-speed (1.5 Mb/s) operations
o
High-speed optimized host controller
with transaction translator for complete
backward compatibility with full-speed
and low-speed products
o
Two high-speed USB ports; one port
remains host while the other can be
configured as peripheral, host or On-
The-Go (dual role)
o
Simultaneous operation of both ports
The Oxford Semiconductor OXU210HP is a single-chip, high-speed USB host
and high-speed USB peripheral controller with integrated transceivers. It is the
fourth controller in the family of integrated, low-cost, high-performance, On-
The-Go (OTG) controllers that have been specifically designed for embedded
systems.
The OXU210HP operates up to 480 Mb/s, using a compatible EHCI-based core.
It also includes an integrated transaction translator that supports full-speed (12
Mb/s) and low-speed (1.5 Mb/s) USB peripherals.
The selectable 16- and 32-bit processor interface is compatible with a variety of
CPUs. A large 72-Kbyte buffer has also been integrated to reduce interrupts and
minimize CPU overhead.
The OXU210HP supports all USB transfer modes (control, interrupt, bulk, and
isochronous) and is supported with USB device drivers.
Key Features
o
Choice of 16-bit or 32-bit configurable
processor interface
o
Fast microprocessor access cycle and
double/multi-buffering support for
USB transfers
o
Host interface contains support for
common SoC DMA modes including
bursting and slave request/acknowledge
protocols
o
Advanced power management controls
chip clocking and PHY function for
very low power consumption
o
Integrated on-chip VBUS voltage
comparator and 100 mA charge pump
o
72 Kbytes of single-port SRAM
o
True transfer level operation, with
transaction scheduling and handling
(data sequence toggle, error retry, etc.),
implemented in hardware
o
Integrated PLL runs from a single 12-
MHz crystal or an external 12-MHz
clock source
o
Operating temperature range: -40° to
85° C
Product Ordering Information
Part Number
OXU210HP
EV-OXU210-PCI
Description
Local Bus to Hi-Speed USB 2.0 Host,
Peripheral/OTG controller
OXU210HP Rapid Development Kit
PLX Technology, Inc. All rights reserved. PLX, the PLX logo, ExpressLane, Read Pacing and Dual Cast are
trademarks of PLX Technology, Inc. All other product names that appear in this material are for identification
purposes only and are acknowledged to be trademarks or registered trademarks of their respective companies.
Information supplied by PLX is believed to be accurate and reliable, but PLX assumes no responsibility for any
errors that may appear in this material. PLX reserves the right, without notice, to make changes in product
design or specification.
Visit
for more information.
© PLX Technology, www.plxtech.com
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4/8/2009, Version 1.0