PCI 9054
Highlights
s
PCI
PCI Bus Master I/O Accelerator Chip
Continuing our tradition of providing the world’s most advanced and highest
performance PCI-to-Local bus devices, PLX is offering the PCI 9054 Bus Master
I/O Accelerator. The PCI 9054 is an ideal solution for high performance
Motorola MPC 850/860 PowerQUICC
®
designs, CompactPCI
®
Hot Swap adapters,
PCI bus master adapters, and embedded host designs. The PCI 9054 offers a
variety of technological advances and features designed to simplify complex
telecom, networking and I/O adapter embedded designs.
Motorola MPC 850/860 PowerQUICC Designs
The 3.3V PCI 9054 is a perfect match for high performance MPC 850/860 adapter
designs. The PCI 9054 provides an advanced Data Pipe Architecture
TM
with two
DMA engines, an enhanced direct-connect interface to the MPC 850/860, a
50MHz Local bus, and an industrial temperature range 225-ball PBGA.
CompactPCI Hot Swap Adapter Designs
To address the expanding CompactPCI Hot Swap market, the PCI 9054 offers a
configurable Local Bus, unlimited bursting, and Hot Swap Friendly features like
the Hot Swap Configuration Register, and resources for software connection
control of the ENUM# signal, ejector switch, and the status LED.
Additional PCI Bus Master Features
For advanced high performance adapter designs, the PCI 9054 also offers Hot
Plug compatibility, power management and incorporates PLX’s proven industry
standard I2O v1.5 Ready messaging unit.
The flexible PCI 9054 local bus allows easy connection to a wide variety of
memory, I/O peripherals and CPUs including direct connections to the Motorola
MPC 850/860, Intel i960, IBM PPC 401 processors and many others. Take advan-
tage of what industry leaders already know: PLX PCI Accelerators are
the
solution
for leading telecom, networking, and I/O adapter designs.
v2.2 compliant 32-bit 33MHz
Bus Master Interface Controller
enables PCI Burst Transfers up to
132Mbytes/second
Purpose Bus Master
Interface featuring an advanced
Data Pipe Architecture™ which
includes two DMA engines, pro-
grammable Target and Initiator
data transfer modes and PCI
messaging functions
v2.2 Power Management
Spec compatible
v2.2 Vital Product Data
(VPD) configuration support
Dual Address Cycle
(DAC) support
Interrupt Generator
Burst
s
General
s
PCI
s
PCI
s
PCI
s
Programmable
s
Programmable
Management
s
Supports
Type 0 and Type 1
Configuration Cycles
Local Bus Direct-
Connect to MPC 850/860
PowerQUICC, Intel i960, and
IBM PPC 401 CPUs and similar
bus protocol devices
5V Tolerant PCI signaling
supports Universal PCI Adapter
designs
3.3V, 5V Tolerant Local
Bus operation up to 50MHz
Multiplexed, or Non-
Multiplexed Local Bus Supports
8-, 16-, and 32-Bit Peripheral
and Memory devices
Hot Swap Friendly
s
Supports
s
3.3V,
s
Flexible
s
32-Bit
s
CompactPCI
s
I
2O v1.5 Ready Messaging Unit
s
Industrial Temp Range Operation
s
3.3V
CMOS in 176-pin PQFP
or 225-ball PBGA packages
PLX [ PLX TECHNOLOGY ]
