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PCI9656RDK-LITE 参数 Datasheet PDF下载

PCI9656RDK-LITE图片预览
型号: PCI9656RDK-LITE
PDF下载: 下载PDF文件 查看货源
内容描述: 快速开发套件对于PCI 9656的通用局部总线设计 [Rapid Development Kit For PCI 9656 Generic Local Bus Designs]
分类和应用: PC
文件页数/大小: 2 页 / 174 K
品牌: PLX [ PLX TECHNOLOGY ]
 浏览型号PCI9656RDK-LITE的Datasheet PDF文件第2页  
High-Performance,
Flexible Hardware
Development Platform
s
PCI
PCI 9656RDK-LITE
Rapid Development Kit For PCI 9656 Generic Local Bus Designs
An Invaluable Development Aid
The PLX PCI 9656RDK-LITE (RDK-LITE) delivers a flexible development platform for
designs using the PCI 9656 with generic 32-bit local bus devices. The RDK-LITE is
shipped pre-configured for de-multiplexed generic address/data bus operation, but is
very easily reconfigured for multiplexed address/data bus applications. The RDK-LITE
provides 32 suftace-mount footprints for hardware designers to easily add processors,
DSPs, ASICs, FPGAs, memory, and I/O devices to test, simulate, and debug their
designs without fabricating their own boards, which can save considerable time in the
development process and shorten time to market. The RDK-LITE also includes the PLX
Software Development Kite Lite Edition (SDK-LITE) CD, which provides a complete
Microsoft Windows
®
software development environment. The PCI 9656RDK-LITE's
software, hardware registers, and footprints are backward-compatible with the PCI
9054RDK-LITE, simplifying the move from existing 32-bit, 33MHz PCI 9054 generic
local-bus designs into 64-bit, 66MHz PCI 9656 based products.
r2.2 compliant PCI
form factor
PCI 9656 I/O Accelerator
s
The
Supports 64-bit, 66MHz
PCI bus operation
Supports 32-bit, 66MHz
generic Local Bus operation
s
CPLD
Local Bus memory
controller and 128KB SRAM
Option Module (POM)
expansion connector
surface mount footprints
for processors, DSPs, ASICs,
FPGAs, memory, I/O devices
0.1" through hole grid
space for through hole devices
s
PLX
s
32
s
30x25
Complete Design
Documentation
s
OrCAD
s
Bill
A Complete Package
The hardware reference board serves as both a hardware and software development
platform for PCI 9656 based designs. This board is configured for de-multiplexed
address and data bus operation (C Mode), but it is user configurable for multiplexed
address and data bus operation (J Mode). Its local bus memory controller and SRAM
enable immediate Direct Slave and DMA code development and testing. Its large and
flexible prototyping area enables the easy extension of the test and debug features of
the RDK to include your value added logic.
The Hardware Development Kit LITE (HDK-LITE) CD-ROM includes complete
documentation of the reference board hardware design, making its components easily
reusable in your designs. This documentation includes the board schematics, the board
layout source and output files, Bill of Materials (BOM), the Verilog source code for the
CPLD memory controller and manuals in PDF fromat.
The SDK-LITE is a CD-ROM which provides a complete set of Windows host side
software and tools, including host-side Windows 98/Me/NT/2000 drivers for the
reference board, PCI 9656 specific APIs and object code libraries, and the PLXMon
Windows GUI debug tool. The APIs are backward compatible with the PCI 9054,
enabling the easy migration of PCI 9054 software to the PCI 9656.
schematics
of Materials (BOM)
s
OrCAD
layout source with
Gerber output files
Memory controller
Verilog source code
hardware manuals in
PDF format
s
CPLD
s
All
Complete Windows Host
Software Development
Environment
s
Windows
98/Me/NT/2000
device drivers with source
code
9656 Windows Host API
and object code library
Windows GUI
debug tool for monitoring,
debugging, configuration,
and code download
Management Event
D
3COLD
wake-up event
emulation
s
PCI
PCI 9656RDK-LITE Block Diagram
28-PIN PLCC
0.5 mm, 208/144/80-PIN QPF
on the other side
on the other side
48-PIN
SSOP
48-PIN
SSOP
28-PIN
SOIC
28-PIN
SOIC
s
PLXMon
POM1 Connector
1.0mm
BGA
25 x25
LED's
0.8mm
44-PIN
QFP
0.5mm
240/176/100-PIN
QFP
25 x 30
0.1" THROUGH HOLE
PROTOTYPE AREA
SRAM
RS-232
Serial Port
Test Header 6 Test Header 4
Test Header 3
OSC
FLASH
ROM
s
Power
CPLD
0.5mm
208/104/80-PIN
QFP
54-PIN TSOP
54-PIN TSOP
EEPROM
Test Header 5
0.5mm,
176/100-PIN QFP
on the other side
Test Header 1
Test Header 2
0.65mm
160/112-PIN
QFP
0.05"
BGA
26 x 26
16-PIN
SOIC
16-PIN
SOIC
DC/DC
PCI 9656
0.8mm
44-PIN
QFP
84/68/44/28-PIN
PLCC
0.4mm, 128-PIN QFP
on the other side
64-bit, 66MHz PCI Bus
28-PIN PLCC
on the other side