four x4 downstream ports. The downstream ports can be
of differing widths if required.
Almost all (non x86 based) high-end microprocessor
manufacturers are offering PCI Express interfaces. The
PEX 8525 can be directly connected to a processor to
fan-out its PCIe port to a larger number of ports for
enhanced connectivity as illustrated in Figure 3.
MIPS
or
PowerPC
x8
x4
x4
x4
PEX 8525
x4
Figure 3. Fan out for PowerPC/MIPS CPUs
Embedded Systems
The PEX 8525 can also be utilized in embedded
applications. Figure 4 shows several independent
modules connecting through the PEX 8525. The port
widths for each module can be configured as required.
The peer-to-peer communication feature of the PEX
8525 allows these modules to communicate with each
other without any centralized control.
CPU
Control
Graphics Fan-out Switch
As PCIe based graphics cards become more mainstream,
it will be necessary to take a x8 port on the root complex
device and fan it out to two x8 ports for dual graphics
applications. Root Complex (Northbridge) devices are
available with multiple PCIe ports. These ports can be
further expanded to connect to a larger number of I/Os
or to support dual-graphics using the PEX 8525 as
shown in Figure 6. In this dual graphics application
example, a x8 port on the root complex device is fanning
out to two PCIe graphics cards via x8 links. The figure
also shows how some of the ports can be bridged to
provide
PCI or PCI-X
slots through the use of the
ExpressLane
PEX 8114 and PEX 8111 PCIe
bridging
devices.
CPU
x8
x8
PEX 8525
PEX 8532
x8
Root
Complex
Memory
South
Bridge
USB
GbE
HDD
PCI
PEX
PEX 8111
8111
x1
x8
x4
PEX 8114
PEX 8516
FPGA/ASIC
FPGA/ASIC
DSP
Sensor
CPU
CPU Bus
Bridge
x1
Local Bus
Bridge
Bridge
Local Bus
Bridge
Figure 6. Dual Graphics Fan-out
PCI Express Port Expansion
The PEX 8525 enables designers to take, for example,
two x8 PCIe ports and expand them into eight
downstream ports. Some of these PCIe ports can be
bridged to PCI or PCI-X using bridging products from
PLX. Figure 7 illustrates one of the many configurations
the PEX 8525 can support.
CPU
CPU
CPU
CPU
x4
x8
PEX 8525
x4
x8
Figure 4. Embedded Systems
Peer to Peer Communication
Figure 5 represents a backplane where the PEX 8525
provides peer-to-peer data exchange for up to four line
cards where the CPU/Host plays the management role.
x8
Memory
North
Bridge
x4
x8
South
Bridge
USB
GbE
I/O
I/O
x4
x4
Host
x4
x8
x4
x4
PEX 8525
HDD
PCI
I/O
I/O
x4
x4
PEX 8525
x4
PEX 8111
x1
PEX 8525
x4
x4
x4
PEX 8114
Figure 5. Peer-to-Peer Usage
Figure 7. PCIe Port Expansion
PLX Confidential
PLX [ PLX TECHNOLOGY ]
