PMC
FEATURES
•
Low Voltage Operation
- Dual read V
CC
ranges: 2.7 V to 3.6 V or 4.5 V to
5.5 V
- Program/Erase voltage: V
CC
- 2.7 V to 3.6 V and
V
PP
- 11.5 V to 12.5 V
• High Performance Read
- 70 ns access time
• Electrical Chip Erase and Byte Program
Using EPROM Programmer
-
Maximum 20 µs/byte programming
- Maximum 100 ms chip erase
- Do not require UV erase
Pm37LV512
512 Kbit (64K X 8) Dual-Voltage Multiple-Cycle-Programmable ROM
• Low Power Consumption
- Typical 5 mA active read current
- Typical 18 µA CMOS standby current
• Excellent Product Reliablity
- Guarantee minimum 1,000 program/erase cycles
- Minimum 20 years data retention
• JEDEC Standard Byte-wide Flash Memory
Pin-out
• Industrial Standard Packaging
- 32-pin PLCC
- 32-pin PDIP
- 32-pin VSOP
GENERAL DESCRIPTION
The Pm37LV512 is a 512 Kbit, Multiple-Cycle-Programmable Read-Only-Memory (MCP ROM) organized as 65,563
bytes of 8 bits each. The program and erase operation of device can be done on EPROM programmers by applying
3.0 Volt V
CC
and 12.0 Volt V
PP
to A9 and/or OE# pin. This eliminates the need of a UV-Source for erase operation
such as EPROM device. The read operation of device can be in 2.7 Volt to 3.6 Volt or 4.5 Volt - 5.5 Volt range
compatible to either 3.0 Volt or 5.0 Volt systems. The dual read operation ranges can greatly increase application
flexibility for users.
The device has a standard microprocessor interface as well as JEDEC single-power-supply Flash compatible pin-
out. For applications that do not require in-system-programming (ISP) function for firmwire upgrade, the Pm37LV512
offers a direct cost reduction path for Flash memory, i.e. Pm39LV512, without modifying the schematic and board
layout of system.
The Pm37LV512 is manufactured on PMC’s advanced nonvolatile CMOS technology, P-FLASH™. The device is
offered in 32-pin PLCC, VSOP and PDIP packages with access time of 70 ns.
Programmable Microelectronics Corp.
1
Issue Date: Dec, 2002 Rev:1.3
PMC [ PMC-SIERRA, INC ]
