PM5342 SPECTRA-155
DATA SHEET
PMC-970133
ISSUE 4
SONET/SDH PAYLOAD EXTRACTOR/ALIGNER
Register B8H, C8H, D8H: TPIP Path BIP-8 LSB
Bit
Type
R
R
R
R
R
R
R
R
Function
BE[7]
BE[6]
BE[5]
BE[4]
BE[3]
BE[2]
BE[1]
BE[0]
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
X
X
X
X
This register reports the lower eight bits of the BIP-8 error counter.
Register B9H, C9H, D9H: TPIP Path BIP-8 MSB
Bit
Type
R
R
R
R
R
R
R
R
Function
BE[15]
BE[14]
BE[13]
BE[12]
BE[11]
BE[10]
BE[9]
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
X
X
X
X
BE[8]
This register reports the upper eight bits of the BIP-8 error counter.
BE[15:0]:
Bits BE[15:0] represent the number of path bit-interleaved parity errors that
have been detected since the last time the path BIP-8 registers were polled
by writing to the SPECTRA-155 Reset and Identity register. The write access
transfers the internally accumulated error count to the path BIP-8 registers
within 7 µs and simultaneously resets the internal counter to begin a new
cycle of error accumulation.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
267
PMC [ PMC-SIERRA, INC ]
