PM73121ꢀAAL1gator II
Data Sheet
PMC-Sierra, Inc.
PMC-980620
,VVXHꢀꢁ
AAL1 SAR Processor
Table 6. UTOPIA Interface Signals (Continued)
ATM Mode
Signal
PHY Mode
Signal
Reset
Value*
Pin #
Type
Description
/TATM_EN
RPHY_CLAV
22
Out
1(ATM) ATM: Transmit UTOPIA ATM Layer Enable is an
Z(PHY) active low signal asserted by the AAL1gator II during
cycles when TATM_DATA contains valid data. It is
not asserted until the AAL1gator II is ready to send a
full cell.
PHY: Receive UTOPIA PHY Layer Cell Available is
an active high signal asserted by the AAL1gator II to
indicate it is ready to deliver a complete cell. In
MPHY mode, this signal is driven only when /RPHY_
ADDR is low in the previous cycle.
Maximum output current (IMAX) = 8 mA.
/TATM_FULL
/RPHY_EN
23
In
NA
ATM: Transmit UTOPIA ATM Layer Full is an active
low signal from the PHY layer device to indicate that
a maximum of four additional transmit data writes
will be accepted.
PHY: Receive UTOPIA PHY Layer Enable is an
active low signal asserted by the ATM layer to
indicate RPHY_DATA and RPHY_SOC will be
sampled at the end of the next cycle. In MPHY mode,
the AAL1gator II will drive data only if /RPHY_
ADDR was low on the falling edge of /RPHY_EN.
RATM_CLK
RATM_SOC
TPHY_CLK
TPHY_SOC
16
In
NA
ATM: Receive UTOPIA ATM Layer Clock is the
synchronization clock input for synchronizing data
input on RATM_DATA.
PHY: Transmit UTOPIA PHY Layer Clock is the
synchronization clock input for synchronizing data
input on TPHY_DATA.
Maximum frequency is 33 MHz.
11
In
In
NA
NA
ATM: Receive UTOPIA ATM Layer Start-Of-Cell is
an active high signal asserted by the PHY layer when
RATM_DATA contains the first valid byte of a cell.
PHY: Transmit UTOPIA PHY Layer Start-Of-Cell is
an active high signal asserted by the ATM layer when
TPHY_DATA contains the first valid byte of a cell.
RATM_DATA(7:0) TPHY_DATA(7:0)
3-10
ATM: Receive UTOPIA ATM Layer Data Bits 7 to 0
form the byte-wide data from the PHY layer device.
Bit 0 is the LSB. Bit 7 is the MSB and should be
received first.
PHY: Transmit UTOPIA PHY Layer Data Bits 7 to 0
form the byte-wide data from the ATM layer device.
Bit 0 is the LSB. Bit 7 is the MSB and should be
received first.
ꢇꢁ
PMC [ PMC-SIERRA, INC ]
