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    PM7324-BI 参数 Datasheet PDF下载

    PM7324-BI图片预览
    型号： PM7324-BI
    PDF下载： 下载PDF文件 查看货源
    内容描述： S / UNI - ATM层解决方案 [S/UNI-ATM LAYER SOLUTION]
    分类和应用： 异步传输模式ATM
    文件页数/大小： 473 页 / 1461 K
    品牌： PMC [ PMC-SIERRA, INC ]
     浏览型号PM7324-BI的Datasheet PDF文件第2页浏览型号PM7324-BI的Datasheet PDF文件第3页浏览型号PM7324-BI的Datasheet PDF文件第4页浏览型号PM7324-BI的Datasheet PDF文件第5页浏览型号PM7324-BI的Datasheet PDF文件第7页浏览型号PM7324-BI的Datasheet PDF文件第8页浏览型号PM7324-BI的Datasheet PDF文件第9页浏览型号PM7324-BI的Datasheet PDF文件第10页  
    PM7324 S/UNI-ATLAS
    S/UNI-ATLAS
    DATASHEET
    PMC-1971154
    ISSUE 7
    S/UNI-ATM LAYER SOLUTION
    LIST OF FIGURES
    FIGURE 1 S/UNI-ATLAS BLOCK DIAGRAM................................................................................................ 8
    FIGURE 2 VC SEARCH KEY COMPOSITION ........................................................................................... 47
    FIGURE 3 PARAMETERS OF THE PRIMARY KEY AND SECONDARY KEY .......................................... 49
    FIGURE 4 SEARCH KEY LOCATIONS WITHIN THE ROUTING WORD ................................................. 50
    FIGURE 5 ATLAS SEARCH TABLE STRUCTURE .................................................................................... 52
    FIGURE 6 EGRESS ROUTING WORD AND EGRESS LOOKUP ADDRESS............................................ 65
    FIGURE 7 ATLAS PM FLOWS
    ........................................................................................................ 86
    FIGURE 8 F4 TO F5 OAM FLOWS ...................................................................................................... 116
    FIGURE 9 INGRESS TERMINATION OF F4 SEGMENT AND END-TO-END-POINT
    CONNECTIONS............................................................................................. 117
    FIGURE 10 INGRESS TERMINATION OF F4 SEGMENT AND END-TO-END POINT CONNECTION .. 118
    FIGURE 11 INGRESS TERMINATION OF F4 SEGMENT END-POINT CONNECTION.......................... 119
    FIGURE 12 INGRESS TERMINATION OF F4 END-TO-END POINT CONNECTION.............................. 120
    FIGURE 13 F5 TO F4 OAM FLOWS ...................................................................................................... 124
    FIGURE 14 EGRESS TERMINATION OF A VPC SEGMENT END-POINT ............................................. 125
    FIGURE 15 VPC INTERMEDIATE POINT............................................................................................... 126
    FIGURE 16 VCC INTERMEDIATE POINT................................................................................................ 126
    FIGURE 17 VPC SEGMENT END-POINT ................................................................................................ 127
    FIGURE 18 VCC SEGMENT END POINT ................................................................................................ 127
    FIGURE 19 VPC SEGMENT END-POINT AND END-TO-END POINT .................................................... 128
    FIGURE 20 INGRESS VPC END-TO-END POINT AND SEGMENT END-POINT, VC SEGMENT
    END-POINT AND SEGMENT SOURCE POINT. EGRESS VPC END-TO-
    END AND SEGMENT SOURCE POINT WITH VCC SEGMENT END-
    POINT AND VCC SEGMENT SOURCE POINT ............................................ 128
    FIGURE 21 INGRESS VPC END-TO-END AND SEGMENT END POINT WITH VC INTERMEDIATE
    POINT. EGRESS VPC END-TO-END AND SEGMENT SOURCE POINT
    WITH VC INTERMEDIATE POINT AND VC SEGMENT SOURCE POINT. .. 129
    FIGURE 22 INPUT OBSERVATION CELL (IN_CELL) ............................................................................ 413
    FIGURE 23 OUTPUT CELL (OUT_CELL) ................................................................................................ 413
    FIGURE 24 BI-DIRECTIONAL CELL (IO_CELL) ...................................................................................... 414
    FIGURE 25 LAYOUT OF OUTPUT ENABLE AND BI-DIRECTIONAL CELLS ......................................... 414
    FIGURE 26 EIGHT BIT WIDE CELL FORMAT......................................................................................... 416
    FIGURE 27 SIXTEEN BIT WIDE CELL FORMAT .................................................................................... 417
    FIGURE 28 COMMON OAM CELL FORMAT ........................................................................................... 419
    FIGURE 29 SPECIFIC FIELDS FOR AIS/RDI FAULT MANAGEMENT CELL ......................................... 420
    FIGURE 30 SPECIFIC FIELDS FOR THE FPM CELL ............................................................................. 420
    FIGURE 31 SPECIFIC FIELDS FOR THE BR CELL ................................................................................ 421
    FIGURE 32 CONNECTION INSERTION WHEN BINARY TREE IS EMPTY............................................ 424
    FIGURE 33 CONNECTION INSERTION WHEN BINARY TREE CONTAINS ONLY SINGLE VC
    RECORD. ...................................................................................................... 424
    FIGURE 34 CONNECTION INSERTION AT THE ROOT OF THE TREE................................................. 425
    FIGURE 35 CONNECTION INSERTION IN THE MIDDLE OF THE BINARY TREE. ............................... 426
    FIGURE 36 NEW SECONDARY SEARCH TABLE ENTRY INSERTED AT A LEAF. .............................. 427
    FIGURE 37 BOUNDARY SCAN ARCHITECTURE................................................................................... 431
    FIGURE 38 TAP CONTROLLER FINITE STATE MACHINE .................................................................... 433
    FIGURE 39 INGRESS INPUT CELL INTERFACE (RPOLL=0) ................................................................ 436
    FIGURE 40 INGRESS INPUT CELL INTERFACE (RPOLL=1) EXAMPLE 1........................................... 437
    FIGURE 41 INGRESS INPUT CELL INTERFACE (RPOLL=1) EXAMPLE 2............................................ 438
    FIGURE 42 INGRESS OUTPUT CELL INTERFACE (OTSEN=0) ............................................................ 439
    FIGURE 43 INGRESS OUTPUT CELL INTERFACE (OTSEN=1) ............................................................ 440
    FIGURE 44 EGRESS INPUT CELL INTERFACE (IPOLL=0) ................................................................... 441
    FIGURE 45 EGRESS INPUT CELL INTERFACE POLLED MODE (IPOLL=1) ........................................ 443
    FIGURE 46 EGRESS OUTPUT CELL INTERFACE DIRECT MODE (TPOLL=0) .................................... 444
    FIGURE 47 EGRESS OUTPUT CELL INTERFACE POLLED MODE (TPOLL=1) ................................... 445
    FIGURE 48 MICROPROCESSOR INTERFACE READ TIMING .............................................................. 451
    PROPRIETARY AND CONFIDENTIAL
    iv

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