PM7329 S/UNI-APEX-1K800
DATASHEET
PMC-2010141
ISSUE 2
ATM TRAFFIC MANAGER AND SWITCH
Register 0x380-0x38C: Memory Read Data (Burstable)
Bit
31:0
Type
R
Function
MPRdDataN[31:0]
, N = 0..3
Default
0
Reads from this register will be delayed until the MPBusy bit in the control
register is clear.
MPRdDataN[31:0], N = 0..3
The least significant 32 bits of read data from the address and aperture as
specified in the memory port control register. MPRdDataN corresponds to
MPLWordEn[N].
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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