PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
Figure 34
- Any-PHY Transmit Slave
TCLK
TADR[10:0]
TCSB
IMA-ADR
PHY 7
PHY 1
Data K
PHY 0
2 TCLK
TPA
TDAT[m:0], TPRTY
TENB
IMA-ADR
PHY 1
Data 1
PHY 8 ADR
Data 1
Data 2
Data 3
Data K-1
IMA-ADR
TSX
TSOP
13.3.3 UTOPIA L2 Multi-PHY Receive Slave Interface
Figure 35 gives an example of the functional timing of the receive interface when
configured as a 31-port UTOPIA L2 compliant receive slave. The interface
responds to addresses (as specified by the register Receive Cell Available
Enable) by asserting the RCA corresponding to the addressed PHY when it is
capable of providing a complete cell. As a result, the master selects one of the
S/UNI-IMA-8’s PHYs by presenting the PHY address again during the last cycle
RENB is high. Had not the device been selected, RSOC, RDAT[m:0], and
RPRTY would have remained high-impedance.
Figure 35 illustrates that a cell transfer may be paused by deasserting RENB.
The device is reselected by presenting the PHY’s address the last cycle RENB is
high to resume the transfer.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
292
PMC [ PMC-SIERRA, INC ]
